Abstract
A typical hardware design flow starts with the description of a design at a particular level of abstraction which is then synthesized to the corresponding low-level implementation of the abstract description. For example, RTL (Register Transfer Level) descriptions of hardware designs are synthesized to gate-level implementations, which are further synthesized to the physical level. Thus, hardware designs are described at different levels of abstraction. The abstract description of a design offers the benefits of ignoring low-level details resulting in faster architectural exploration and simulation. On the other hand, low-level implementation presents a more detailed and accurate view of the design. Such a top-down approach is commonly used for the generation of most hardware designs.
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Singh, G., Shukla, S.K. (2010). Introduction. In: Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-6481-6_1
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