Abstract
SPICE [14] based circuit simulation is a traditional workhorse in the VLSI design process. Given the pivotal role of SPICE in the IC design flow, there has been significant interest in accelerating SPICE. Since a large fraction (on average 75%) of the SPICE runtime is spent in evaluating transistor model equations, a significant speedup can be availed if these evaluations are accelerated.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
BSIM3 Homepage. http://www-device.eecs.berkeley.edu/~bsim3
BSIM4 Homepage. http://www-device.eecs.berkeley.edu/~bsim4
Capsim Hierarchical Spice Simulation. http://www.xcad.com/xcad/spice-simulation.html
FineSIM SPICE. http://www.magmada.com/c/SVX0QdBvGgqX/Pages/FineSimSPICE.html
NVIDIA Tesla GPU Computing Processor. http://www.nvidia.com/object/IO_43499.html
OmegaSim Mixed-Signal Fast-SPICE Simulator. http://www.nascentric.com/product.html
Virtuoso UltraSim Full-chip Simulator. http://www.cadence.com/products/custom_ic/ultrasim/index.aspx
Agrawal, P., Goil, S., Liu, S., Trotter, J.: Parallel model evaluation for circuit simulation on the PACE multiprocessor. In: Proceedings of the Seventh International Conference on VLSI Design, pp. 45–48 (1994)
Agrawal, P., Goil, S., Liu, S., Trotter, J.A.: PACE: A multiprocessor system for VLSI circuit simulation. In: Proceedings of SIAM Conference on Parallel Processing, pp. 573–581 (1993)
Amdahl, G.: Validity of the single processor approach to achieving large-scale computing capabilities. Proceedings of AFIPS 30, 483–485 (1967)
Dartu, F., Pileggi, L.T.: TETA: transistor-level engine for timing analysis. In: DAC ’98: Proceedings of the 35th Annual Conference on Design Automation, pp. 595–598 (1998)
Gulati, K., Croix, J., Khatri, S.P., Shastry, R.: Fast circuit simulation on graphics processing units. In: Proceedings, IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC), pp. 403–408 (2009)
Hachtel, G., Brayton, R., Gustavson, F.: The sparse tableau approach to network analysis and designation. Circuits Theory, IEEE Transactions on 18(1), 101–113 (1971)
Nagel, L.: SPICE: A computer program to simulate computer circuits. In: University of \nobreak California, Berkeley UCB/ERL Memo M520 (1995)
Nagel, L., Rohrer, R.: Computer analysis of nonlinear circuits, excluding radiation. IEEE Journal of Solid States Circuits SC-6, 162–182 (1971)
Pillage, L.T., Rohrer, R.A., Visweswariah, C.: Electronic Circuit & System Simulation Methods. McGraw-Hill, New York (1994). ISBN-13: 978-0070501690 (ISBN-10: 0070501696)
Sadayappan, P., Visvanathan, V.: Circuit simulation on shared-memory multiprocessors. IEEE Transactions on Computers 37(12), 1634–1642 (1988)
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2010 Springer Science+Business Media, LLC
About this chapter
Cite this chapter
Gulati, K., Khatri, S.P. (2010). Accelerating Circuit Simulation Using Graphics Processors. In: Hardware Acceleration of EDA Algorithms. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-0944-2_10
Download citation
DOI: https://doi.org/10.1007/978-1-4419-0944-2_10
Published:
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-0943-5
Online ISBN: 978-1-4419-0944-2
eBook Packages: EngineeringEngineering (R0)