Skip to main content

Accelerating Circuit Simulation Using Graphics Processors

  • Chapter
  • First Online:
Hardware Acceleration of EDA Algorithms
  • 1146 Accesses

Abstract

SPICE [14] based circuit simulation is a traditional workhorse in the VLSI design process. Given the pivotal role of SPICE in the IC design flow, there has been significant interest in accelerating SPICE. Since a large fraction (on average 75%) of the SPICE runtime is spent in evaluating transistor model equations, a significant speedup can be availed if these evaluations are accelerated.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

eBook
USD 16.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 149.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. BSIM3 Homepage. http://www-device.eecs.berkeley.edu/~bsim3

  2. BSIM4 Homepage. http://www-device.eecs.berkeley.edu/~bsim4

  3. Capsim Hierarchical Spice Simulation. http://www.xcad.com/xcad/spice-simulation.html

  4. FineSIM SPICE. http://www.magmada.com/c/SVX0QdBvGgqX/Pages/FineSimSPICE.html

  5. NVIDIA Tesla GPU Computing Processor. http://www.nvidia.com/object/IO_43499.html

  6. OmegaSim Mixed-Signal Fast-SPICE Simulator. http://www.nascentric.com/product.html

  7. Virtuoso UltraSim Full-chip Simulator. http://www.cadence.com/products/custom_ic/ultrasim/index.aspx

  8. Agrawal, P., Goil, S., Liu, S., Trotter, J.: Parallel model evaluation for circuit simulation on the PACE multiprocessor. In: Proceedings of the Seventh International Conference on VLSI Design, pp. 45–48 (1994)

    Google Scholar 

  9. Agrawal, P., Goil, S., Liu, S., Trotter, J.A.: PACE: A multiprocessor system for VLSI circuit simulation. In: Proceedings of SIAM Conference on Parallel Processing, pp. 573–581 (1993)

    Google Scholar 

  10. Amdahl, G.: Validity of the single processor approach to achieving large-scale computing capabilities. Proceedings of AFIPS 30, 483–485 (1967)

    Google Scholar 

  11. Dartu, F., Pileggi, L.T.: TETA: transistor-level engine for timing analysis. In: DAC ’98: Proceedings of the 35th Annual Conference on Design Automation, pp. 595–598 (1998)

    Google Scholar 

  12. Gulati, K., Croix, J., Khatri, S.P., Shastry, R.: Fast circuit simulation on graphics processing units. In: Proceedings, IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC), pp. 403–408 (2009)

    Google Scholar 

  13. Hachtel, G., Brayton, R., Gustavson, F.: The sparse tableau approach to network analysis and designation. Circuits Theory, IEEE Transactions on 18(1), 101–113 (1971)

    Article  Google Scholar 

  14. Nagel, L.: SPICE: A computer program to simulate computer circuits. In: University of \nobreak California, Berkeley UCB/ERL Memo M520 (1995)

    Google Scholar 

  15. Nagel, L., Rohrer, R.: Computer analysis of nonlinear circuits, excluding radiation. IEEE Journal of Solid States Circuits SC-6, 162–182 (1971)

    Google Scholar 

  16. Pillage, L.T., Rohrer, R.A., Visweswariah, C.: Electronic Circuit & System Simulation Methods. McGraw-Hill, New York (1994). ISBN-13: 978-0070501690 (ISBN-10: 0070501696)

    Google Scholar 

  17. Sadayappan, P., Visvanathan, V.: Circuit simulation on shared-memory multiprocessors. IEEE Transactions on Computers 37(12), 1634–1642 (1988)

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Kanupriya Gulati .

Rights and permissions

Reprints and permissions

Copyright information

© 2010 Springer Science+Business Media, LLC

About this chapter

Cite this chapter

Gulati, K., Khatri, S.P. (2010). Accelerating Circuit Simulation Using Graphics Processors. In: Hardware Acceleration of EDA Algorithms. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-0944-2_10

Download citation

  • DOI: https://doi.org/10.1007/978-1-4419-0944-2_10

  • Published:

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4419-0943-5

  • Online ISBN: 978-1-4419-0944-2

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics