Generation and Use of an ASIP Software Tool Chain

Abstract

Software-development tool chains are hardware-dependent by their nature, because compilers and assemblers targeted to specific processors must generate target-specific code. However, a processor that is both configurable and extensible, with a variable instruction set architecture (ISA) melded to a basic architecture compounds the problems of adapting the software development tools to specific processor configurations. The only tractable way to support such extensible processor ISAs is through a highly automated tool-generation flow that allows the dynamic creation and adaptation of the development-tool chain to a specific instance of the processor. To be of practical use, this process (automated tool generation) must transpire in minutes. This chapter discusses the issues of application-specific instruction set processor (ASIP) configurability and extensibility as they relate to all the elements of a software development tool chain ranging from an integrated development environment (IDE) to compilers, profilers, instruction-set simulators (ISS), operating systems, and many other development tools and middleware. In addition to drawing out the issues involved, we illustrate possible solutions to these hardware-dependent software (HdS) problems by drawing on the experience of developing Tensilica’s Xtensa processor, as an example.