The modeling strategy based on the development of generic behavioral models as described in the previous part allows to represent several systems of classes of architectures at different levels of abstraction. Interaction schemes derived from simulation approaches in both the time and frequency domain can be adopted as explained in the previous chapters. An efficient way to represent designs and to calculate their performance values is only one part of a design strategy. Indeed, question remains which architecture and parameter values to select during the specialization of the generic behavioral model. Therefore, the synthesis strategy presented in this chapter completes the design strategy based on generic behavior introduced in Chap. 3.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
L. J. Breems. A Cascaded Continuous-Time ΣΔ Modulator with 67dB Dynamic Range in 10MHz Bandwidth. In IEEE Int. Solid-State Circuits Conf., pages 72–73, San Francisco, Feb. 2004.
H. Chang, E. Charbon, U. Choudhury, A. Demir, E. Felt, E. Liu, E. Malavasi, A. Sangiovanni-Vincentelli, and I. Vassiliou, editors. A Top-Down, Constraint-Driven Design Methodology for Analog Integrated Circuits. Kluwer Academic, 1996.
L. W. Couch II. Digital and Analog Communication Systems. Prentice-Hall, New Jersey, 1997.
M. Fares and B. Kaminska. FPAD: A Fuzzy Nonlinear Programming Approach to Analog Circuit Design. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 14(7):785–793, July 1995.
M. Flynn and B. Sheahan. A 400MSample/s 6b CMOS Folding and Interpolating ADC. In IEEE Int. Solid-State Circuits Conf., pages 150–151, San Francisco, Feb. 1998.
P. Fontaine, A. N. Mohieldin, and A. Bellaouar. A Low-Noise Low-Voltage CT ΔΣ Modulator with Digital Compensation of Excess Loop Delay. In IEEE Int. Solid-State Circuits Conf., pages 498–499, San Francisco, Feb. 2005.
A. Geist, A. Beguelin, J. Dongarra, W. Jiang, and R. Manchek. PVM: Parallel Virtual Machine — A Users’ Guide and Tutorial for Network Parallel Computing. The MIT Press, Cambridge, 1994.
G. G. E. Gielen and R. A. Rutenbar. Computer-Aided Design of Analog and Mixed-Signal Integrated Circuits. Proceedings of the IEEE, 88(12):1825–1854, Dec. 2000.
N. C. Horta and J. E. Franca. Algorithm-Driven Synthesis of Data Conversion Architectures. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 16(10):1116–1135, Oct. 1997.
J. R. Koza. Genetic Programming. On the Programming of Computers by Means of Natural Selection. Bradford Book, Cambridge, 1992.
J. R. Koza, F. H. Bennett, III, D. Andre, M. A. Keane, and F. Dunlap. Automated Synthesis of Analog Electrical Circuits by Means of Genetic Programming. IEEE Trans. on Evolutionary Computation, 1(2):109–128, July 1997.
E. Lauwers and G. Gielen. Power Estimation Methods for Analog Circuits for Architectural Exploration of Integrated Systems. IEEE Trans. on Very Large Scale Integration (VLSI) Systems, 10(2):155–162, Apr. 2002.
T. H. Lee. The Design of CMOS Radio-Frequency Integrated Circuits. Cambridge University Press, Cambridge, 1998.
J. Lin and B. Haroun. An Embedded 0.8V/480μW 6b/22MHz Flash ADC in 0.13μm Digital CMOS Process using Nonlinear Double-Interpolation Technique. In IEEE Int. Solid-State Circuits Conf., pages 308–309, San Francisco, Feb. 2002.
A. Marques, V. Peluso, M. S. Steyaert, and W. M. Sansen. Optimal Parameters for ΔΣ Modulator Topologies. IEEE Trans. on Circuits and Systems—II: Analog and Digital Signal Processing, 45(9):1232–1241, Sept. 1998.
E. Martens and G. Gielen. Top-Down Heterogeneous Synthesis of Analog and Mixed-Signal Systems. In IEEE/ACM Design, Automation and Test in Europe Conf. and Exhibition, pages 275–280, Munich, Mar. 2006.
E. S. J. Martens and G. G. E. Gielen. Analyzing Continuous–Time ΔΣ Modulators With Generic Behavioral Models. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 25(5):924–932, May 2006.
E. S. Ochotta, R. A. Rutenbar, and L. R. Carley. Synthesis of High-Performance Analog Circuits in ASTRX/OBLX. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 15(3):273–294, Mar. 1996.
S. Park, Y. Palaskas, and M. P. Flynn. A 4GS/s 4b Flash ADC in 0.18μm CMOS. In IEEE Int. Solid-State Circuits Conf., pages 570–571, San Francisco, Feb. 2006.
R. Phelps, M. Krasnicki, R. A. Rutenbar, L. R. Carley, and J. R. Hellums. Anaconda: Simulation-Based Synthesis of Analog Circuits Via Stochastic Pattern Search. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 19(6):703–717, June 2000.
K. Philips, P. A. C. M. Nuijten, R. Roovers, F. Munoz, M. Tejero, and A. Torralba. A 2mW 89dB DR Continuous-Time ΣΔ ADC with Increased Immunity to Wide-Band Interferers. In IEEE Int. Solid-State Circuits Conf., pages 86–87, San Francisco, Feb. 2004.
B. Razavi. Principles of Data Conversion System Design. Wiley, New York, 1995.
K. Sushihara and A. Matsuzawa. A 7b 450MSample/s 50mW CMOS ADC in 0.3mm2. In IEEE Int. Solid-State Circuits Conf., pages 170–171, San Francisco, Feb. 2002.
A. Torralba, J. Chávez, and L. G. Franquelo. FASY: A Fuzzy-Logic Based Tool for Analog Synthesis. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 15(7):705–715, July 1996.
R. van de Plassche. Integrated Analog-to-Digital and Digital-to-Analog Converters. Kluwer Academic, Dordrecht, 1994.
E. J. van der Zwan. A 2.3mW CMOS ΣΔ Modulator for Audio Applications. In IEEE Int. Solid-State Circuits Conf., pages 220–221, San Francisco, Feb. 1997.
E. J. van der Zwan and E. C. Dijkmans. A 0.2mW CMOS ΣΔ Modulator for Speech Coding with 80dB Dynamic Range. In IEEE Int. Solid-State Circuits Conf., pages 232–233, San Francisco, Feb. 1996.
A. G. W. Venes and R. J. van de Plassche. An 80-MHz, 80-mW, 8-b CMOS Folding A/D Converter with Distributed Track-and-Hold Preprocessing. IEEE Journal of Solid-State Circuits, 31(12):1846–1853, Dec. 1996.
L. Yao, M. Steyaert, and W. Sansen. A 1V 88dB 20kHz ΣΔ Modulator in 90nm CMOS. In IEEE Int. Solid-State Circuits Conf., pages 80–81, San Francisco, Feb. 2004.
Rights and permissions
Copyright information
© 2008 Springer Science + Business Media B.V
About this chapter
Cite this chapter
(2008). Top-Down Heterogeneous Optimization. In: High-Level Modeling and Synthesis of Analog Integrated Systems. Analog Circuits and Signal Processing Series. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-6802-7_6
Download citation
DOI: https://doi.org/10.1007/978-1-4020-6802-7_6
Publisher Name: Springer, Dordrecht
Print ISBN: 978-1-4020-6801-0
Online ISBN: 978-1-4020-6802-7
eBook Packages: EngineeringEngineering (R0)