This chapter focuses on two CMOS implementations of high-frequency SC BPFs that draw on the design concepts developed in Chapter 5, i.e. delta-charge redistribution (δ-QR) and orthogonal hardware redistribution (OHM). The first BPF to be presented is called a TV Cloche filter and is required in conventional terrestrial television receivers for high-frequency de-emphasis of SECAM TV video signals[72]. It is one of the most difficult TV filters to integrate on chip with sufficient accuracy [73]. The second BPF to be presented is an integrated version of the IF channel selection filter in FM radio receivers with a centre frequency of 10.7MHz [77]. Up till now, the limitations of integrated radio selectivity filters in terms of power dissipation, dynamic range and cost, are such that it is still required to use an external ceramic 10.7MHz bandpass filter. This design demonstrates a CMOS SC IF filter that can be integrated with most of the rest of the FM receiver, eliminating external components and printed circuit board area.
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© 2007 Springer
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(2007). High-Accuracy d-QR SC BPF Design and Measurements. In: Switched-Capacitor Techniques For High-Accuracy Filter And ADC Design. Analog Circuits And Signal Processing Series. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-6258-2_6
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DOI: https://doi.org/10.1007/978-1-4020-6258-2_6
Publisher Name: Springer, Dordrecht
Print ISBN: 978-1-4020-6257-5
Online ISBN: 978-1-4020-6258-2
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