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Zabel, H., Rettberg, A., Krupp, A. (2007). Approach for a Formal Verification of a Bit-serial Pipelined Architecture. In: Rettberg, A., Zanella, M.C., Dömer, R., Gerstlauer, A., Rammig, F.J. (eds) Embedded System Design: Topics, Techniques and Trends. IFIP – The International Federation for Information Processing, vol 231. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-72258-0_5
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