Abstract
Hardware designs typically combine parallelism and resource-sharing; a circuit’s correctness relies on shared resources being accessed mutually exclusively. Conventional high-level synthesis systems guarantee mutual exclusion by statically serialising access to shared resources during a compile-time process called scheduling. This approach suffers from two problems: (i) there is a large class of practical designs which cannot be scheduled statically; and (ii) a statically fixed schedule removes some opportunities for parallelism leading to less efficient circuits.
This paper surveys the expressivity of current scheduling methods and presents a new approach which alleviates the above problems: first scheduling logic is automatically generated to resolve contention for shared resources dynamically; then static analysis techniques remove redundant scheduling logic.
We call our method Soft Scheduling to highlight the analogy with Soft Typing: the aim is to retain the flexibility of dynamic scheduling whilst using static analysis to remove as many dynamic checks as possible.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Aldrich, J., Chambers, C., Sirer, E., Eggers, S. Static Analyses for Eliminating Unnecessary Synchronization from Java Programs. Proceedings of the International Symposium on Static Analysis 1999. LNCS Vol. 1694, Springer Verlag.
Berkel, K. van. Handshake Circuits: an Asynchronous Architecture for VLSI Programming. International Series on Parallel Computation, Vol. 5. Published by Cambridge University Press, 1993.
Burstall, R.M. and Darlington, J. A Transformation System for Developing Recursive Programs, JACM 24(1).
Cartwright, R. and Fagan, M. Soft Typing. Proceedings of the ACM SIGPLAN 1991 Conference on Programming Language Design and Implementation
De Micheli, G., Ku, D., Mailhot, F., Truong, T. The Olympus Synthesis System for Digital Design. IEEE Design & Test Magazine, October 1990.
De Micheli, G. Synthesis and Optimization of Digital Circuits. Published by McGraw-Hill Inc., 1994.
Edwards, D., Bardsley, A. Balsa 3.0 User Manual. Available from http://www.cs.man.ac.uk/amulet/projects/balsa/
Hennessy, J., Patterson, D. Computer Architecture A Quantitative Approach. Published by Morgan Kaufmann Publishers, Inc. (1990); ISBN 1-55860-069-8
IEEE. Verilog HDL Language Reference Manual. IEEE Draft Standard 1364, October 1995.
Ku, D., De Micheli, G. Relative Scheduling Under Timing Constraints: Algorithms for High-Level Synthesis of Digital Circuits. IEEE Transactions on CAD/ICAS, June 1992.
Ku, D., De Micheli, G. HardwareC—a language for hardware design (version 2.0). Stanford University Technical Report No. CSL-TR-90-419.
Ku, D., De Micheli, G. Constrained Resource Sharing and Conflict Resolution in Hebe. Integration-The VLSI Journal, December 1991.
Milner, R., Tofte, M., Harper, R. and MacQueen, D. The Definition of Standard ML (Revised). MIT Press, 1997.
Milner, R. The Polyadic π-calculus: a tutorial. Technical Report ECS-LFCS-91-180, Laboratory for Foundations of Computer Science, University of Edinburgh, October 1991.
Mycroft, A. and Sharp, R. A Statically Allocated Parallel Functional Language. Proc. of the International Conference on Automata, Languages and Programming 2000. LNCS Vol. 1853, Springer-Verlag.
Mycroft, A. and Sharp, R. Hardware/Software Co-Design Using Functional Languages. Proc. of Tools and Algorithms for the Construction and Analysis of Systems 2001. LNCS Vol. 2031, Springer-Verlag.
Page, I. and Luk, W. Compiling Occam into Field-Programmable Gate Arrays. In Moore and Luk (eds.) FPGAs, pages 271–283. Abingdon EE&CS Books, 1991.
Sharp, R. and Mycroft, A. The FLaSH Compiler: Efficient Circuits from Functional Specifications. AT&T Technical Report tr.2000.3. Available from http://www.uk.research.att.com
Sharp, R. and Mycroft, A. A Higher Level Language For Hardware Synthesis. To appear: Proc. of Correct Hardware Design and Verification Methods (CHARME), 2001.
Tenison Tech EDA. CtoV Reference Manual. Available from http://www.tenisontech.com
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2001 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Sharp, R., Mycroft, A. (2001). Soft Scheduling for Hardware. In: Cousot, P. (eds) Static Analysis. SAS 2001. Lecture Notes in Computer Science, vol 2126. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-47764-0_4
Download citation
DOI: https://doi.org/10.1007/3-540-47764-0_4
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-42314-0
Online ISBN: 978-3-540-47764-8
eBook Packages: Springer Book Archive