Abstract
Continuing advances in VLSI technology render a billion-transistor SOC device inevitable in the near future. However, along with this opportunity the excessive amount of power that billions of transistors will consume will be the most important challenge to the design of the future chips. Many techniques have been developed in order to reduce the power consumption of microprocessors. Unfortunately, this often comes at the expense of performance. In this paper, we describe a number of techniques which are currently used when designing low power, high performance microprocessors. These include fabrication process, circuit technology, and microprocessor architecture. Since most techniques result in complex tradeoffs, we will show how decisions regarding the selection of a low power design approach require careful consideration.
This work was supported in part by the Ministry of Information and Communication, Korea, under the ITRC program supervised by the IITA and in part by the Research Grant of Kwangwoon University in 2005.
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Lee, SW., Park, N., Gaudiot, JL. (2006). Low Power Microprocessor Design for Embedded Systems. In: Gavrilova, M.L., et al. Computational Science and Its Applications - ICCSA 2006. ICCSA 2006. Lecture Notes in Computer Science, vol 3983. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11751632_68
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DOI: https://doi.org/10.1007/11751632_68
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