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Power Reduction Coding for Buses

Energy Measures and Performance Limits

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Interconnect-Centric Design for Advanced SoC and NoC

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Abstract

We know that coding can reduce power consumption in buses. We would like to know how much power reduction is possible. This chapter presents: energy models of deep sub-micron buses, the coupling between energy and transmitted information, the ultimate limits of achievable power reduction using coding, a global theoretical framework of power reduction coding.

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Author information

Authors and Affiliations

  1. Electrical and Computer Engineering, Johns Hopkins University, USA

    Paul P. Sotiriadis

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  1. Paul P. Sotiriadis
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Editors and Affiliations

  1. Tampere University of Technology, Finland

    Jari Nurmi

  2. Royal Institute of Technology, Sweden

    Hannu Tenhunen  & Axel Jantsch  & 

  3. University of Turku, Finland

    Jouni Isoaho

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Sotiriadis, P.P. (2005). Power Reduction Coding for Buses. In: Nurmi, J., Tenhunen, H., Isoaho, J., Jantsch, A. (eds) Interconnect-Centric Design for Advanced SoC and NoC. Springer, Boston, MA. https://doi.org/10.1007/1-4020-7836-6_7

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  • DOI: https://doi.org/10.1007/1-4020-7836-6_7

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4020-7835-4

  • Online ISBN: 978-1-4020-7836-1

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