Abstract
High-speed Digital-to-Analog Converters (DAC) are used in single- and multicarrier communication applications because they simplify the number of mixing and filtering operations in the analog domain. In these applications, CMOS realizations that offer high-frequency linearity over broad bandwidths are required. The Current Steering architecture is the most suitable candidate, however, many nonlinear mechanisms limit its linearity: high sampling rates are possible, but good linearity is achieved only at small fractions of the Nyquist band, or at a large power and area penalty. Here, a rational design process will be described which demonstrates that high frequency linearity can be achieved at a low cost in power consumption and silicon area.
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Doris, K., Roermund, A.v. (2006). HIGH-SPEED DIGITAL TO ANALOG CONVERTERS. In: Steyaert, M., Huijsing, J., van Roermund, A. (eds) Analog Circuit Design. Springer, Dordrecht. https://doi.org/10.1007/1-4020-3885-2_6
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DOI: https://doi.org/10.1007/1-4020-3885-2_6
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