Summary
In this chapter we have discussed a variety of practical techniques for constructing testbenches in SystemC, tracing data during simulation, and debugging SystemC designs.It is likely that most of these techniques will prove valuable in almost all SystemC designs since a great deal of effort is typically required in the debugging and verification process, regardless of the modeling levels or design methodology used in a particular case.
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© 2002 Kluwer Academic Publishers
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(2002). Testbenches, Tracing, and Debugging. In: System Design with SystemC. Springer, Boston, MA. https://doi.org/10.1007/0-306-47652-5_10
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DOI: https://doi.org/10.1007/0-306-47652-5_10
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4020-7072-3
Online ISBN: 978-0-306-47652-5
eBook Packages: Springer Book Archive