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Reliability and Yield Improvement

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Cmos Memory Circuits

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Abstract

Reliability greatly effects the application area, environments, and costs, while yield strongly influences the manufacturing costs of CMOS memories. Both the reliability and yield of CMOS memories can highly be enhanced, in addition to various circuit and process technological approaches, by implementations of circuit redundancies. For CMOS memory circuits the issues; how redundancy effects reliability and yield, what the principal noises, failures, faults and errors are, what methods can be applied to control noises, reduce failures, repair faults and correct errors, how much redundancy is needed, and how to obtain fault-tolerance by fault-repair and error control code implementations, are described in the present chapter.

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© 2002 Kluwer Academic Publishers

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(2002). Reliability and Yield Improvement. In: Cmos Memory Circuits. Springer, Boston, MA. https://doi.org/10.1007/0-306-47035-7_5

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  • DOI: https://doi.org/10.1007/0-306-47035-7_5

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-0-7923-7950-8

  • Online ISBN: 978-0-306-47035-6

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