Abstract
Analysis of binary programs is important to ensure correct execution of corresponding higher-level programs, especially because it accounts for bugs introduced by compilers. Moreover, source code may not always be available for correctness analysis. Proving correctness of binaries often involves significant user expertise and time-consuming manual effort. We describe an approach to automatically verify some X86 binary programs using symbolic execution on an executable formal model of the X86 instruction set architecture. Our approach can reduce the time and effort involved in the proof development process for complex programs.
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Kaufmann, M., Moore, J.S.: ACL2 home page, http://www.cs.utexas.edu/users/moore/acl2
Moore, J.S.: Mechanized Operational Semantics, http://www.cs.utexas.edu/users/moore/publications/talks/marktoberdorf-08/index.html
Ray, S., Moore, J.S.: Proof Styles in Operational Semantics. In: Hu, A.J., Martin, A.K. (eds.) FMCAD 2004. LNCS, vol. 3312, pp. 67–81. Springer, Heidelberg (2004)
Swords, S.: A Verified Framework for Symbolic Execution in the ACL2 Theorem Prover. PhD thesis, Department of Computer Sciences, The University of Texas at Austin (2010)
Boyer, R.S., Hunt Jr., W.A.: Function memoization and unique object representation for ACL2 functions. In: Proceedings of the Sixth International Workshop on the ACL2 Theorem Prover and its Applications, pp. 81–89. ACM (2006)
Hunt Jr., W.A.: FM8501: A Verified Microprocessor. LNCS, vol. 795. Springer, Heidelberg (1994)
Sawada, J., Hunt Jr., W.A.: Verification of FM9801: An Out-of-Order Microprocessor Model with Speculative Execution, Exceptions, and Program-Modifying Capability. Formal Methods in Systems Design 20(2), 187–222 (2002)
Hunt, J. W.A.: Microprocessor design verification. Journal of Automated Reasoning 5, 429–460 (1989)
Hunt Jr., W.A., Swords, S., Davis, J., Slobodova, A.: Use of Formal Verification at Centaur Technology. In: Hardin, D.S. (ed.) Design and Verification of Microprocessor Systems for High-Assurance Applications, pp. 65–88. Springer (2010)
Fox, A.: Directions in ISA specification. Interactive Theorem Proving, 338–344 (2012)
Degenbaev, U.: Formal specification of the x86 instruction set architecture (2012)
Bevier, W.R.: A Verified Operating System Kernel. PhD thesis, Department of Computer Sciences, The University of Texas at Austin (1987)
Boyer, R.S., Kaufmann, M., Moore, J.S.: The Boyer-Moore theorem prover and its interactive enhancement. Computers & Mathematics with Applications 29(2), 27–62 (1995)
Boyer, R.S., Yu, Y.: Automated Proofs of Object Code for a Widely Used Microprocessor. Journal of the ACM 43(1), 166–192 (1996)
Matthews, J., Moore, J.S., Ray, S., Vroon, D.: Verification condition generation via theorem proving. In: Hermann, M., Voronkov, A. (eds.) LPAR 2006. LNCS (LNAI), vol. 4246, pp. 362–376. Springer, Heidelberg (2006)
Gordon, M.J.C., Melham, T.F. (eds.): Introduction to HOL: A Theorem-Proving Environment for Higher-Order Logic. Cambridge University Press (1993)
Sewell, P., Sarkar, S., Owens, S., Nardelli, F.Z., Myreen, M.O.: x86-tso: a rigorous and usable programmer’s model for x86 multiprocessors. Communications of the ACM 53(7), 89–97 (2010)
Alglave, J., Fox, A., Ishtiaq, S., Myreen, M.O., Sarkar, S., Sewell, P., Nardelli, F.Z.: The semantics of power and arm multiprocessor machine code. In: Proceedings of the 4th Workshop on Declarative Aspects of Multicore Programming, pp. 13–24. ACM (2009)
Feng, X., Shao, Z., Guo, Y., Dong, Y.: Certifying low-level programs with hardware interrupts and preemptive threads. Journal of Automated Reasoning 42(2), 301–347 (2009)
Dowek, G., Felty, A., Huet, G., Paulin, C., Werner, B.: The Coq Proof Assistant User Guide Version 5.6. Technical Report TR 134, INRIA (December 1991)
Myreen, M.O., Gordon, M.J.C., Slind, K.: Decompilation Into Logic - Improved. In: Formal Methods in Computer-Aided Design (FMCAD), pp. 78–81 (2012)
Fox, A.C.J.: LCF-style bit-blasting in HOL4. In: van Eekelen, M., Geuvers, H., Schmaltz, J., Wiedijk, F. (eds.) ITP 2011. LNCS, vol. 6898, pp. 357–362. Springer, Heidelberg (2011)
Myreen, M., Davis, J.: A verified runtime for a verified theorem prover. In: Interactive Theorem Proving, pp. 265–280 (2011)
Kaufmann, M., Moore, J.S.: ACL2 documentation, http://www.cs.utexas.edu/users/moore/acl2/acl2-doc.html
Google Code: ACL2 Books Repository, http://code.google.com/p/acl2-books/
Intel: Intel 64 and IA-32 Architectures Software Developer’s Manual (January 2013), http://download.intel.com/products/processor/manual/325462.pdf
Boyer, R.S., Moore, J.S.: Single-threaded Objects in ACL2. In: Adsul, B., Ramakrishnan, C.R. (eds.) PADL 2002. LNCS, vol. 2257, pp. 9–27. Springer, Heidelberg (2002)
ACL2 Documentation: Abstract Stobjs, http://www.cs.utexas.edu/users/moore/acl2/current/DEFABSSTOBJ.html
Goel, S., Hunt, W., Kaufmann, M.: Abstract Stobjs and Their Application to ISA Modeling. In: Gamboa, R., Davis, J. (eds.) Eleventh International Workshop on the ACL2 Theorem Prover and Its Applications (ACL2 2013) (2013)
Hunt Jr., W.A., Kaufmann, M.: A formal model of a large memory that supports efficient execution. In: Cabodi, G., Singh, S. (eds.) Proceedings of the 12th International Conference on Formal Methods in Computer-Aided Design (FMCAD 2012), Cambrige, UK, October 22-25 (2012)
Swords, S., Davis, J.: Bit-blasting ACL2 theorems. In: Hardin, D., Schmaltz, J. (eds.) Proceeding 10th International Workshop on the ACL2 Theorem Prover and its Applications. EPTCS, vol. 70, pp. 84–102 (2011)
Anderson, S.: Bit Twiddling Hacks, http://graphics.stanford.edu/~seander/bithacks.html
Kaufmann, M., Hunt Jr., W.A.: Towards a formal model of the x86 ISA. Technical Report TR-12-07, Department of Computer Sciences, University of Texas at Austin (May 2012)
Kaufmann, M., Sumners, R.: Efficient Rewriting of Data Structures in ACL2. In: 3rd ACL2 Workshop (2002)
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Goel, S., Hunt, W.A. (2014). Automated Code Proofs on a Formal Model of the X86. In: Cohen, E., Rybalchenko, A. (eds) Verified Software: Theories, Tools, Experiments. VSTTE 2013. Lecture Notes in Computer Science, vol 8164. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-54108-7_12
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DOI: https://doi.org/10.1007/978-3-642-54108-7_12
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