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The structure of FPGA-based cyclic-code converters

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Abstract

We offer a universal multilevel structure (of parallel and parallel-sequential types) that uses logical AND, NOR and OR functions to convert cyclic code words containing a cyclic group of units or zeros. Realized as FPGAs, the structures are proved to ensure correct operation. The results of simulation experiments are given as time diagrams.

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Authors and Affiliations

  1. V.M. Glushkov Institute of Cybernetics, National Academy of Sciences, Kiev, Ukraine

    Alexander Palagin, Vladimir Opanasenko & Sergey Krivoi

  2. Taras Shevchenko Kiev National University, Kiev, Ukraine

    Alexander Palagin, Vladimir Opanasenko & Sergey Krivoi

Authors
  1. Alexander Palagin
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  2. Vladimir Opanasenko
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  3. Sergey Krivoi
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Corresponding author

Correspondence to Vladimir Opanasenko.

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Palagin, A., Opanasenko, V. & Krivoi, S. The structure of FPGA-based cyclic-code converters. Opt. Mem. Neural Networks 22, 207–216 (2013). https://doi.org/10.3103/S1060992X13040024

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  • DOI: https://doi.org/10.3103/S1060992X13040024

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