Application of Self-Assembled Monolayers to the Electroless Metallization of High Aspect Ratio Vias for Microelectronics

Abstract

All-wet electroless metallization of through-silicon vias (TSVs) with a width of 5 μm and a 1:10 aspect ratio was carried out. Immersion in a n-(2-aminoethyl) 3-aminopropyl-trimethoxysilane (AEAPTMS) self-assembled monolayer (SAM) was used to enhance the adhesion between the metal film and substrate. Contact angle variation and atomic force microscopy were used to verify the formation of a SAM layer. A PdCl₂ solution was later used to activate the silanized substrates, exploiting the affinity of the –NH₃ functional group of AEAPTMS to palladium. A nickel-phosphorus-boron electroless bath was employed to deposit the first barrier layer onto silicon. The NiPB growth rate was evaluated on flat silicon wafers, while the structure of the coating obtained was investigated via glow discharge optical emission spectroscopy. Cross-sectional scanning electron microscope observations were carried out on metallized TSVs to characterize the NiPB seed, the Cu seed layer deposited with a second electroless step, and the Cu superfilling obtained with a commercial solution. Complete filling of TSV was achieved.