We report on conventional multichannel ZnO nanowire field-effect transistors (FETs) operating in one device in a dual-gate mode. Our FETs were prepared by assembling ZnO nanowires on a Si substrate using an optimized dielectrophoresis technique with bottom-gate and top-gate FET structures. We observed that the enhancement of the electrical characteristics in FETs with top-gate mode operation results from a thinner gate oxide and top-gate geometry compared with FETs with bottom-gate mode operation. It was also verified that surface passivation strongly affected the electrical performance of ZnO nanowire FETs.
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Acknowledgement
This work was supported by Korea Research Foundation Grant funded by Korean Government (MOEHRD) (KRF-2008-005-J00301).
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Dong-Joo Kim, Jung-Hwan Hyung, and Duk-Won Seo contributed equally to this work.
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Kim, DJ., Hyung, JH., Seo, DW. et al. Dual-Gate Multiple-Channel ZnO Nanowire Transistors. J. Electron. Mater. 39, 563–567 (2010). https://doi.org/10.1007/s11664-009-0984-z
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DOI: https://doi.org/10.1007/s11664-009-0984-z