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Model-Driven Approach for Early Power-Aware Design Space Exploration of Embedded Systems

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Abstract

Due to the growing complexity of Systems-on-Chip (SoC) and the increasing cost of their redesign and fabrication, industrials are urgently looking for design methodologies allowing them to identify issues early in the design flow and to explore the largest possible space of solutions. Several aspects should be taken into account in this context, among which power consumption is considered as a major concern. In this paper, we present a Model Driven Engineering (MDE) approach for early power-aware Design Space Exploration (DSE). This approach facilitates designers work by abstracting the energetic behavior of embedded systems through high-level models targeting an automatic generation of power-aware simulation code. It offers also the possibility to model dynamic power management aspects in order to use the corresponding generated code for DSE. This approach was implemented in the DSE toolkit TTool by integrating power concepts in its DIPLODOCUS UML profile and its simulator. This paper illustrates the proposed approach through a Software-Defined Radio (SDR) case study integrating the Dynamic Slack Reclamation (DSR) policy for dynamic power management. The processor power estimates obtained by the generated simulation code were compared to those obtained from physical implementation on the Xilinx Zynq-7000 platform. This comparison showed that our MDE approach allows to take efficient design decisions early in the design flow.

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References

  1. Rabaey, J. (2009). Low power design essentials in springer publishing company incorporated.

  2. Venkatachalam, V., & Franz, M. Power reduction techniques for microprocessor system. In ACM Comput. Surv., vol. 37, no. 3, pp. 195–237, Sep. 2005. [Online]. Available:http://doi.acm.org/10.1145/1108956.1108957.

  3. Lu, Y.-H., Chung, E.-Y., Simunic, T., Benini, L., & De Micheli, G. Quantitative comparison of power management algorithms. In Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings. IEEE, 2000, pp. 20–26.

  4. Choi, K., Lee, W., Soma, R., & Pedram, M. Dynamic voltage and frequency scaling under a precise energy model considering variable and fixed components of the system power dissipation. In IEEE/ACM International Conference on Computer Aided Design, November 2004.

  5. SystemC. IEEE Standard for Standard SystemC Language Reference Manual, IEEE, https://standards.ieee.org/findstds/standard/1666-2011.html.

  6. Fischer, B., Cech, C., & Muhr, H. Power Modeling and Analysis in Early Design Phases. In Proceedings of the Conference on Design, Automation & Test in Europe, DATE ’14, 2014, Dresden, Germany, http://dl.acm.org/citation.cfm?id=2616606.2616848.

  7. Atkinson, C., & Kühne, T. (2003). Model-driven development: a metamodeling foundation. IEEE Software, 20(5), 36–41.

    Article  Google Scholar 

  8. Mbarek, O., Khecharem, A., Pegatoquet, A., & Auguin, M. Using model driven engineering to reliably accelerate early low power intent exploration for a system-on-chip design. In Proceedings of the 27th annual acm symposium on applied computing, ser. SAC ’12. New York, NY, USA: ACM, 2012, pp. 1580–1587.

  9. OMG (2007). Unified Modeling Language (OMG UML), no November.

  10. Friedenthal, S., Moore, A., & Steiner, R. (2008). A practical guide to sysML: Systems modeling language. San Francisco, CA USA: Morgan Kaufmann Publishers Inc.

  11. Number, O.M.G.D., & Files, A. (2009). UML Profile for marte : Modeling and analysis of real-time embedded systems. Engineering, 15, 738.

    Google Scholar 

  12. Apvrille, L. Ttool for DIPLODOCUS: An environment for design space exploration. In Proceedings of the 8th international conference on New technologies in distributed systems, ser. NOTERE ’08. New York, NY, USA: ACM, 2008, pp. 28:1–28:4.

  13. Brooks, D., Tiwari, V., & Wattch, M.M.. In ISCA, Canada, 2000: A framework for architectural-level power analysis and optimizations.

  14. Ye, W., Vijaykrishnan, N., Kandemir, M., & Irwin, M. The design and use of simplepower: A cycle-accurate energy estimation tool. In DAC, Los Angelos, California, 2000.

  15. Donlin, A. (2004). Transaction level: flows and use models, CODES+ISSS.

  16. Lo, Y., Abdi, S., & Gajski, D. Transaction level model automation for multicore systems. In Proceedings of the 38th DAC Conference, IGI Global, 2009.

  17. Lee, I., & Al.. PowerVip SoC power estimation framework at transaction level.

  18. Dhanwada, N., & Al. A power estimation methodology for systemc transaction level models. In CODES+ISSS New Jersey USA, 2005.

  19. Atitallah, R.B., Niar, S., & Dekeyser, J.-L. MPSOc power estimation framework at transaction level modeling. In ICM, Cairo, Egypt, 2007.

  20. Tiwari, V., Malik, S., & Wolfe, A. (1994). Power analysis of embedded software: A first step towards software power minimization. IEEE Transactions On Very Large Scale Integration (VLSI) Systems, 4, 2.

    Google Scholar 

  21. Sinha, A., & Chandrakasan, A. Jouletrack - a web based tool for software energy profiling. In Proceedings of the 38th DAC conference, 2000.

  22. Julien, N., Laurent, J., Senn, E., & Martin, E. Power estimation of a c algorithm based on the functional-level power analysis of a digital signal processor. In ISHPC’02: Proceedings of the 4th International Symposium on High Performance Computing, London UK, 2002.

  23. Senn, E., Laurent, J., Julien, N., & Martin, E. Softexplorer : estimation, characterization and optimization of the power and energy consumption at the algorithmic level. In IEEE PATMOS, Santorin, Greece, 2004.

  24. Storm simulation tool. [Online]. Available: http://storm.rts-software.org.

  25. Abdallah, A., Gamatié, A., & Dekeyser, J. Correct and energy-efficient design of SoCs: The h. 264 encoder case study. In System on Chip (SoC), 2010 International Symposium on. IEEE, 2010, pp. 115–120.

  26. Bhatti, K. (2011). Energy-aware scheduling for multiprocessor real-time systems. Ph.D. dissertation: Université Nice Sophia Antipolis.

    Google Scholar 

  27. Choi, K., Lee, W., Soma, R., & Pedram, M. Dynamic voltage and frequency scaling under a precise energy model considering variable and fixed components of the system power dissipation.

  28. Shin, D., & Kim, J. (2005). Intra-task voltage scheduling on dvs-enabled hard real-time systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 24(10), 1530–1549.

    Article  Google Scholar 

  29. Bhatti, M.K., Belleudy, C., & Auguin, M. An inter-task real time dvfs scheme for multiprocessor embedded systems. In 2010 Conference on design and architectures for signal and image processing (DASIP). IEEE, 2010, pp. 136–143.

  30. Rethinagiri, S. -K., Palomar, O., Unsal, O., Cristal, A., Atitallah, R.B., & Niar, S. Pets: Power and energy estimation tool at system-level. In 15th international symposium on quality electronic design (ISQED), 2014.

  31. Senn, E., Douhib, S., Blouin, D., Laurent, J., Turki, S., & Diguet, J.-P. (2009) In Radetzki, M. (Ed.), Power and energy estimations in model-based design Vol. 36. Netherlands: Springer. doi:10.1007/978-1-4020-9714-0_1.

  32. Senn, E., Laurent, J., Juin, E., & Diguet, J.-P. Refining power consumption estimations in the component-based aadl design flow. In FDL. EEE, 2008, pp. 173–178.

  33. Laurent, J., Senn, E., Julien, N., & Martin, E. High Level Energy Estimation for DSP Systems. In Proc. Int. workshop on power and timing modeling, optimization and simulation PATMOS, 2001, pp. 311–316.

  34. Oliveira, M.F. da S, de Brisolara, L.B., Carro, L., & Wagner, F.R. Early embedded software design space exploration using UML-based estimation. In Rapid system prototyping, 2006.

  35. Oliveira, M. F. da S, Brio, E.W., Nascimento, F.A., & Wagner, F.R. Model driven engineering for MpSoC design space exploration. In SBCCI’07: Proceedings of the 20th annual conference on Integrated circuits and systems design, Rio de Janeiro, Brazil, 2007.

  36. OMG (2002). UML Profile for schedulability, performance and time.

  37. Ben Atitallah, R., Piel, r., Taillard, J., Niar, S., & Dekeyser, J. -L. From High Level MPSoc description to SystemC Code Generation. In International ModEasy’07 Workshop in conjunction with Forum on specification and Design Languages (FDL’07), Barcelona, Spain, September 2007.

  38. Trabelsi, C., Ben Atitallah, R., Meftali, S., Dekeyser, J.-L., & Jemai, A. (2011). A model-driven approach for hybrid power estimation in embedded systems design. EURASIP Journal on Embedded Systems, 2011 (1), 569031. [Online]. Available: http://hal.inria.fr/hal-00784427.

    Article  Google Scholar 

  39. Ulversoy, T. (2010). Software defined radio: Challenges and opportunities. IEEE Communications Surveys and Tutorials Journal, 12, 531–550.

    Article  Google Scholar 

  40. Piscitelli, R., & Pimentel, A. (2011). A high-level power model for MPSoc on FPGA. IEEE Computer Architecture Letters, 99.

  41. Ouni, B., Belleudy, C., & Senn, E. (2012). Accurate energy characterization of os services in embedded systems. EURASIP J. Emb. Sys., 2012, 6.

    Article  Google Scholar 

  42. Arpinen, T., Salminen, E., Hämäläinen, T.D., & Hännikäinen, M. (2012). Marte profile extension for modeling dynamic power management of embedded systems. Journal of Systems Architecture, 58(5), 209–219.

    Article  Google Scholar 

  43. Gomez, C., DeAntoni, J., & Mallet, F. Power consumption analysis using multi-view modeling.

  44. Power, D. Aceplorer, http://www.doceapower.com/..

  45. Muhammad Khurram, B. (2011). Energy-aware scheduling for multiprocessor real-time systems. THESE: Université de Nice Sophia-Antipolis.

    Google Scholar 

  46. Zhang, W., Williamson, J., & Shang, L. (2011), (pp. 41–80). US: Springer. ch. Power Dissipation.

  47. Xilinx (2014). Xilinx power estimator user guide, Tech. Rep. UG440 (v2014.1).

  48. Altera (2015). Powerplay early power estimator user guide, Tech. Rep. (UG-01070).

  49. Thales group (france), http://www.thalesgroup.com.

  50. Open-people - open-power and energy optimization platform and estimator, http://www.open-people.fr/.

  51. Zynq-7000 All Programmable SoC Overview, XILINX, 2013, v1.6.

  52. Instruments, T. Fusion digital power designer, http://www.ti.com/tool/fusion_digital_power_designer.

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Authors and Affiliations

  1. Institut Mines-Telecom, Telecom ParisTech, Paris, France

    Feriel Ben Abdallah

  2. ESIEA Engineering School, ESIEA Group, Paris, France

    Chiraz Trabelsi

  3. LAMIH, University of Valenciennes, Paris, France

    Rabie Ben Atitallah & Mourad Abed

Authors
  1. Feriel Ben Abdallah
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  2. Chiraz Trabelsi
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  3. Rabie Ben Atitallah
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  4. Mourad Abed
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Correspondence to Chiraz Trabelsi.

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Abdallah, F.B., Trabelsi, C., Atitallah, R.B. et al. Model-Driven Approach for Early Power-Aware Design Space Exploration of Embedded Systems. J Sign Process Syst 87, 271–286 (2017). https://doi.org/10.1007/s11265-016-1144-3

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