Abstract
In this paper we investigate chip bonding technology of GaAs/AlGaAs quantum cascade lasers (QCLs). Its results have strong influence on final performance of devices and are essential for achieving room temperature operation. Various solders were investigated and compared in terms of their thermal resistance and induced stress. The spatially resolved photoluminescence technique has been applied for a device thermal analysis. The soldering quality was also investigated by means of a scanning acoustic microscopy. The particular attention has been paid to Au–Au die bonding, which seems to be a promising alternative to the choice between hard and soft solder bonding of GaAs/AlGaAs QCLs operating from cryogenic temperatures up to room temperatures. A good quality direct Au–Au bonding was achieved for bonding parameters comparable with the ones typical for AuSn eutectic bonding process. High performance room temperature operation of GaAs/AlGaAs QCLs has been achieved with the state-of-the-art parameters.
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1 Introduction
Quantum cascade lasers (QCLs) are unipolar sources of mid infrared radiation (IR) operating on inter-subband transitions as opposed to inter-band transitions in conventional semiconductor lasers (Page et al. 2001; Kosiel et al. 2011). Due to the flexibility of a design (Bugajski et al. 2012) they can operate in a broad spectral range using the same material system, e.g., GaAs/AlGaAs. The construction details of investigated devices can be found in Bugajski et al. (2012, 2014). Due to a high operating current and voltage of such devices, the heat management plays crucial role in their optimization (Pierściński et al. 2014). One of the most important steps during fabrication of QCLs is the device bonding technology. The results of this process have strong influence on final performance of devices and are essential for achieving room temperature operation. The mounting of lasers can be divided into two steps. First one is a die bonding, and the second a wire bonding. During the die bonding a semiconductor chip is attached to a metal heatsink which becomes one of electrodes of the device. There are three main bonding techniques. First is bonding with conductive epoxy. This is very flexible method because there is no limits of a shape of bonded structures. However reliability as well as thermal and electrical properties of a such mounted device are very poor. The remaining two include soldering. The physical basics of soldering are given in the Berenstains paper Bernstein (1966). Generally, bonding is performed by contacting two metal layers, one of which has a higher and a second has lower melting temperature, followed by rising temperature above melting point of the metal with lower melting point. As a result, the inter-diffusion takes place and formed intermetallic phase can have higher melting temperature then metal with lower melting point. There are two kinds of solders. The soft solders, e. g. In Liu et al. (2006) requires low temperature for bonding. Disadvantage of indium solder usage is fast formation of indium oxide in the atmosphere. For this reason the use of reduction atmosphere or vacuum bonding is needed. Another problem is formation of voids in a solder layer which can damage device. The second one, the hard solder, e.g. AuSn has better reliability, however it can introduce additional stress to a bonded heterostructure (Takigawa et al. 2008). In extremal conditions very fragile and thermal unstable layer of \(Au_xSn_y\) can be formed during formation of AuSn–Au bonding (An et al. 2008). We have investigated Au–Au bonding which seems to be promising alternative to the choice between hard and soft solder as a method of die bonding of GaAs/AlGaAs quantum cascade lasers operating from cryogenic up to the room temperatures.
2 Bonding procedure
The metallic contact to epi layers of laser chips was electroplated with gold layer of thickness of about 3 \(\upmu \mathrm {m}\). Then wafer was cleaved into \(500\times 1{,}500\, \upmu \mathrm {m}\) chips. The details of chip metalization can be found in Barańska et al. (2013). Copper heatsinks were electroplated with gold layer of thickness of few microns. For bonding with a soft solder the layer of pure (6 N) indium was thermally evaporated on the heatsink. In order to reduce effect of indium oxidation evaporation was done just before bonding processes. The thickness of evaporated indium layer was: 2, 4 and 6\(\,\upmu \mathrm {m}\). For a hard solder test the 5 \(\upmu \mathrm {m}\) thick AuSn preforms were used. The spatially resolved photoluminescence (SRPL) technique has been applied for device thermal analysis (Wójcik-Jedlińska et al. 2010). Scanning acoustic microscope (SAM) was used to check the bonding quality (Wang et al. 2000). SAM set-up used in this work was developed by Institute of Fundamental Technological Research Polish academy of Science with Institute of Physics Warsaw University of Technology. Resolution of presented SAM pictures is estimated about 10 \(\upmu \mathrm {m}\). The bonding procedure with an indium solder used a two stage temperature profile. During the first stage the temperature was a bit under indium melting point resulting in indium oxide reduction in a forming acid atmosphere. Then the temperature was raised above the melting point of indium and with an incised force applied to a chip the bonding process was performed. For AuSn bonding symmetrical temperature profile with maximal temperature slightly above the melting point of an eutectic was applied with a constant force applied during the bonding process. The maximal temperature during gold to gold bonding was very similar to temperature of the gold-tin eutectic bonding however the plateau of the temperature was hold for longer time period and some ultra sonic power was applied.
Theoretical simulations confirmed that bonding with epi layers to the heatsink reduces device selfheating during operation. The main reason for this is reduction of the distance from the main heat source, i.e., the active region, to the heat sink. In the Fig. 1 there is temperature distribution across the cross-section of the laser for the case of epi-down and epi-up mounting. The ambient temperature was set to 300 K for this calculation. As it can be seen the epi-up mounted structure shows about 10 K higher temperatures. This quite significant difference strongly suggests the need for mounting laser chips with epi layers to the heat sink to obtain better thermal management.
3 Results and discussion
During processing of QCL devices a current crowding mesa is defined by etching double trench pattern. In the Fig. 2 a picture of a laser chip mounted epi-down to the heat sink is presented. A double trench mesa structure can be very stable mounted despite relatively deep etching of nearly 10 \(\upmu \mathrm {m}\) in contrast to the structure with standard ridge type mesa where only small part of a surface area forms a footprint of a mounted chip. The second most important advantage of a such construction, resulting from a bigger effective contact area then in the case of the standard ridge mesa, is the ability to resist the higher applied forces during a bonding process.
The influence of a bonding force on a indium bonding was studied. The series of laser chips was bonded applying various forces: 1, 1.5 and 2 N. Then the structures have been removed from the heatsinks and measurements of solder topography, using mechanical profiler were made. The Fig. 3 shows the respective surface scans of indium covering a heatsink after a gentle chip removal.
As it can be observed with higher bonding forces not only consumption of indium for Au-In intermetallic layer is stronger but also there is indium accumulation at the edges of a semiconductor chip. That may results in creation of shortening channels for current, leading to a device damaging. For a further investigation of bonding quality the SAM was used. The Fig. 4a shows a map of a laser-solder interface after bonding with a low bonding force (1 N).
The dark and light regions result from a difference in phase of reflected acoustic waves. This difference is caused by inhomogeneity of the interface of bonded surfaces. The darker areas in the picture correspond the more inhomogeneous regions of the interface. For the comparison, the Fig. 4b shows a SAM picture of good quality bonding. The only contrast fluctuations observed are on the edges of the semiconductor chip. The bonding with a hard solder, like eutectic AuSn was also investigated. It has been found, that due to the high inducted stress, some laser chips, after a few cycles of cooling to cryogenic temperature and subsequent heating to room temperature, were cracked. That makes a such solder not suitable for QCLs operating in a wide range of temperatures.
Finally, solderless, gold to gold (Au–Au) bonding, widely used in the wire bonding process (Beck and Perez 2007) was investigated. Differently bonded devices were investigated by SRPL to determine the impact of mounting process on thermal resistance of devices. The experimentally determined thermal resistance of investigated devices is plotted as a function of an indium solder thickness in the Fig. 5a. The Fig. 5b presents an increase of an active region temperature of devices mounted with various solder thickness. As it can be seen the Au–Au bonding shows very good thermal performance, however thin In solder (0.8 \( \upmu \mathrm {m}\)) still shows better results. The increasing thickness of indium solder deteriorates thermal resistance of devices.
It can be seen that experimental point for solderless Au–Au bonding fits well calculated dependence of thermal resistivity on the solder thickness. The interface quality of Au–Au bonding is further confirmed by SAM measurement of the chip-heatsink interface (see the Fig. 6a). The observed residual inhomogenities are the most probably caused by roughness of the heatsink surface.
The lasers fabricated using direct Au–Au bonding show the state-of-the-art parameters. Light–current (L–I) and current–voltage characteristics of Au–Au bonded GaAs/AlGaAs lasers at a temperature range \(T\) = 258–303 K are presented in the Fig. 6b. As it can be seen \(I\)–\(V\) measured area does not have kinks connected to a mismatch of electrons’ sublevels. That is why the non-linearity of \(L\)–\(C\) characteristics is connected with a thermal roll-over. That is the prove of device thermal resistance impact on final performance. Lasers were supplied with 100 ns pulses with repetition of 1 kHz. As it can be seen this type of devices delivered over 4 W of an optical power per an an uncoated facet at \(T\) = 77 K Pierściński et al. (2014) and 50 mW with high reflective (HR) back mirror coatings at \(T\)=303 K. The characteristic temperature \(T_0\) = 108 K and an external quantum efficiency \(\eta \) = 0.3 W/A make them practical devices.
4 Conclusion
We have discussed different methods of the die bonding of quantum cascade lasers. Scanning acoustic microscopy was used for a non-invasive investigation of the laser chip-heatsink interface. The soft solder does not introduce a stress but has poor reliability in a room temperature. The hard solder has good temporal stability but a high stress can damage bonded structure. The solder thickness has influence on the thermal resistivity of the device. Solderless bonding gold to gold seems to be a very promising alternative in a technology of QCLs manufacturing.
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Acknowledgments
The work was partially supported by The National Centre for Research by Project LIDER/34/70/L-3/11/NCBR/2012. The authors acknowledge also support from MPNS COST ACTION MP1204 TERA-MIR Radiation: Materials, Generation, Detection and Applications.
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Karbownik, P., Trajnerowicz, A., Szerling, A. et al. Direct Au–Au bonding technology for high performance GaAs/AlGaAs quantum cascade lasers. Opt Quant Electron 47, 893–899 (2015). https://doi.org/10.1007/s11082-014-0031-z
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DOI: https://doi.org/10.1007/s11082-014-0031-z