Skip to main content
Log in

Chain Reduction for Binary and Zero-Suppressed Decision Diagrams

  • Published:
Journal of Automated Reasoning Aims and scope Submit manuscript

Abstract

Chain reduction enables reduced ordered binary decision diagrams (BDDs) and zero-suppressed binary decision diagrams (ZDDs) to each take advantage of the other’s ability to symbolically represent Boolean functions in compact form. For any Boolean function, its chain-reduced ZDD (CZDD) representation will be no larger than its ZDD representation, and at most twice the size of its BDD representation. The chain-reduced BDD (CBDD) of a function will be no larger than its BDD representation, and at most three times the size of its CZDD representation. Extensions to the standard algorithms for operating on BDDs and ZDDs enable them to operate on the chain-reduced versions. Experimental evaluations on representative benchmarks for encoding word lists, solving combinatorial problems, and operating on digital circuits indicate that chain reduction can provide significant benefits in terms of both memory and execution time. The experimental results are further validated by a quantitative model of how decision diagrams scale when encoding sets of sequences. This model explains why the combination of a one-hot encoding of the symbols in the sequences, plus a CBDD, CZDD, or ZDD representation of the set, yields the most compact form.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14

Similar content being viewed by others

References

  1. Babar, J., Jiang, C., Ciardo, G., Miner, A.: Binary decision diagrams with edge-specified reductions. In: Tools and Algorithms for the Construction and Analysis of Systems, Lecture Notes in Computer Science, vol. 11428, pp. 303–318 (2019)

  2. Bahar, R.I., Frohm, E.A., Gaona, C.M., Hachtel, G.D., Macii, E., Pardo, A., Somenzi, F.: Algebraic decision diagrams and their applications. In: Proceedings of the International Conference on Computer-Aided Design, pp. 188–191 (1993)

  3. Brace, K.S., Rudell, R.L., Bryant, R.E.: Efficient implementation of a BDD package. In: Proceedings of the 27th ACM/IEEE Design Automation Conference, pp. 40–45 (1990)

  4. Brglez, F., Fujiwara, H.: A neutral netlist of 10 combinational benchmark circuits and a target translator in Fortran. In: 1985 International Symposium on Circuits And Systems (1985)

  5. Bryant, R.E.: Graph-based algorithms for Boolean function manipulation. IEEE Trans. Comput. C–35(8), 677–691 (1986)

    Article  Google Scholar 

  6. Bryant, R.E.: On the complexity of VLSI implementations and graph representations of Boolean functions with application to integer multiplication. IEEE Trans. Comput. 40(2), 205–213 (1991)

    Article  MathSciNet  Google Scholar 

  7. Bryant, R.E.: Binary decision diagrams. In: Clarke, E.M., Henzinger, T.A., Veith, H., Bloem, R. (eds.) Handbook of Model Checking. Springer, Berlin (2018)

    Google Scholar 

  8. Bryant, R.E.: Chain reduction for binary and zero-suppressed decision diagrams. In: Tools and Algorithms for the Construction and Analysis of Systems, Lecture Notes in Computer Science, vol. 10805, pp. 81–98 (2018)

  9. Bryant, R.E.: Supplementary material regarding chain reduction for binary and zero-suppressed decision diagrams. http://www.cs.cmu.edu/~bryant/bdd-chaining.html (2020)

  10. Daciuk, J., Mihov, S., Watson, B.W., Watson, R.E.: Incremental construction of minimal acyclic finite state automata and transducers. Comput. Linguist. 26, 3–16 (2000)

    Article  MathSciNet  Google Scholar 

  11. Daciuk, J., Watson, B.W., Watson, R.E.: Incremental construction of minimal acyclic finite state automata and transducers. In: Proceedings of the International Workshop on Finite State Methods in Natural Language Processing, pp. 48–56 (1998)

  12. Drechsler, R., Becker, B.: Ordered Kronecker function decision diagrams. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(10), 965–973 (2006)

    Article  Google Scholar 

  13. Fredkin, E.M.: Trie memory. Commun. ACM 3, 490–500 (1960)

    Article  Google Scholar 

  14. Fujita, M., Fujisawa, H., Kawato, N.: Evaluation and improvements of Boolean comparison method based on binary decision diagrams. In: Proceedings of the International Conference on Computer-Aided Design, pp. 2–5 (1988)

  15. Fujita, M., McGeer, P.C., Yang, J.C.: Multi-terminal binary decision diagrams: an efficient data structure for matrix representation. Formal Methods Syst. Des. 10, 149–169 (1997)

    Article  Google Scholar 

  16. Hansen, M., Yalcin, H., Hayes, J.P.: Unveiling the ISCAS-85 benchmarks: a case study in reverse engineering. IEEE Design Test 16(3), 72–80 (1999)

    Article  Google Scholar 

  17. Knuth, D.E.: The Art of Computer Programming, Volume 4A: Combinatorial Algorithms, Part I. Addison Wesley, Reading (2011)

    MATH  Google Scholar 

  18. Kunkle, D., Slavici, V., Cooperman, G.: Parallel disk-based computation for large, monolithic binary decision diagrams. In: International Workshop on Parallel and Symbolic Computation, pp. 63–72. ACM (2010)

  19. Malik, S., Wang, A., Brayton, R.K., Sangiovanni-Vincentelli, A.L.: Logic verification using binary decision diagrams in a logic synthesis environment. In: Proceedings of the International Conference on Computer-Aided Design, pp. 6–9 (1988)

  20. Minato, S.: Zero-suppressed BDDs for set manipulation in combinatorial problems. In: Proceedings of the 30th ACM/IEEE Design Automation Conference, pp. 272–277 (1993)

  21. Minato, S.: Binary Decision Diagrams and Applications for VLSI CAD. Kluwer Academic Publishers, New York (1995)

    MATH  Google Scholar 

  22. Minato, S., Ishiura, N., Yajima, S.: Shared binary decision diagrams with attributed edges for efficient Boolean function manipulation. In: Proceedings of the 27th ACM/IEEE Design Automation Conference, pp. 52–57 (1990)

  23. Preußer, T.B., Engelhardt, M.R.: Putting queens in carry chains, No. 27. J. Signal Process. Syst. 88(2), 185–201 (2017)

    Article  Google Scholar 

  24. Rudell, R.L.: Dynamic variable ordering for ordered binary decision diagrams. In: Proceedings of the International Conference on Computer-Aided Design, pp. 139–144 (1993)

  25. Somenzi, F.: Efficient manipulation of decision diagrams. Int. J. Softw. Tools Technol. Transf. 3(2), 171–181 (2001)

    Article  Google Scholar 

  26. van Dijk, T., Wille, R., Meolic, R.: Tagged BDDs: Combining reduction rules from different decision diagram types. In: Formal Methods in Computer-Aided Design, pp. 108–115 (2017)

  27. Wegener, I.: Branching Programs and Binary Decision Diagrams: Theory and Applications. SIAM, Philadelphia (2000)

    Book  Google Scholar 

  28. Yoneda, T., Hatori, H., Takahara, A., Minato, S.: BDDs vs. zero-suppressed BDDs for CTL symbolic model checking of Petri nets. In: Formal Methods in Computer-Aided Design, Lecture Notes in Computer Science, vol. 1166, pp. 435–449 (1996)

Download references

Acknowledgements

This work has benefited from conversations with Shin-Ichi Minato and Ofer Strichman. This work was supported, in part, by NSF STARSS Grant 1525527.

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Randal E. Bryant.

Additional information

Publisher's Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Bryant, R.E. Chain Reduction for Binary and Zero-Suppressed Decision Diagrams. J Autom Reasoning 64, 1361–1391 (2020). https://doi.org/10.1007/s10817-020-09569-6

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10817-020-09569-6

Keywords

Navigation