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Performance Analysis and Functional Verification of the Stop-and-Wait Protocol in HOL

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Abstract

Real-time systems usually involve a subtle interaction of a number of distributed components and have a high degree of parallelism, which makes their performance analysis quite complex. Thus, traditional techniques, such as simulation, or the state-based formal methods usually fail to produce reasonable results. In this paper, we propose to use higher-order-logic (HOL) theorem proving for the performance analysis of real-time systems. The idea is to formalize the real-time system as a logical conjunction of HOL predicates, whereas each one of these predicates define an autonomous component or process of the given real-time system. The random or unpredictable behavior found in these components is modeled as random variables. This formal specification can then be used in a HOL theorem prover to reason about both functional and performance related properties of the given real-time system. In order to illustrate the practical effectiveness of our approach, we present the analysis of the Stop-and-Wait protocol, which is a classical example of real-time systems. The functional correctness of the protocol is verified by proving that the protocol ensures reliable data transfers. Whereas, the average message delay relation is verified in HOL for the sake of performance analysis. The paper includes the protocol’s formalization details along with the HOL proof sketches for the major theorems.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, Concordia University, 1455 de Maisonneuve W., Montreal, Quebec, H3G 1M8, Canada

    Osman Hasan & Sofiène Tahar

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  1. Osman Hasan
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  2. Sofiène Tahar
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Correspondence to Osman Hasan.

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Hasan, O., Tahar, S. Performance Analysis and Functional Verification of the Stop-and-Wait Protocol in HOL. J Autom Reasoning 42, 1–33 (2009). https://doi.org/10.1007/s10817-008-9105-6

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