Skip to main content

Advertisement

SpringerLink
Log in

Hardware implementation of subsampled adaptive subband digital predistortion algorithm

  • Published:
Analog Integrated Circuits and Signal Processing Aims and scope Submit manuscript

Abstract

Power amplifiers are key elements for transmission systems that have a high impact on transmission quality and energy consumption. While linearity constraints are set to minimize channel interference, power amplifiers are renowned to have a poor energy efficiency in their linear operation region. And reducing the energy footprint of communication systems is a main challenge for future telecommunication networks. Digital predistortion (DPD) is a technique that aims at linearizing power amplifiers and thus allows energy efficiency improvements. However, this technique usually requires to digitize the distorted signal over its entire bandwidth. Up to now, the distorted signals could be digitized using high-performance analog-to-digital converters (ADC). But, the expected increase in bandwidth for new standards will require even wider bandwidths for the DPD feedback path and larger computational resources. The power consumption caused by the additional parts for the DPD may limit the overall efficiency gain of the linearized system particularly for small-cells base stations. Recently, subband approaches have been proposed to relax the design constraints of the feedback path ADC and the digital processing unit in order to minimize the energy consumption of the DPD. We present in this paper a hardware implementation of a subsampled adaptive subband digital predistortion. We show that running the DPD algorithm on circuits synthesized for lower rate reduces the power consumption by a factor 26.9. This power consumption ratio is approximately five times larger than the subsampling ratio showing the interest of subsampled processing since low rate circuits are more power efficient than their high rate counterparts.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8

Similar content being viewed by others

References

  1. Suarez, L., Nuaymi, L., & Bonnin, J. M. (2012). An overview and classification of research approaches in green wireless networks. EURASIP Journal on Wireless Communications and Networking, 2012(1), 142. doi:10.1186/1687-1499-2012-142.

    Article  Google Scholar 

  2. Hasan, Z., Boostanimehr, H., & Bhargava, V. K. (2011). Green cellular networks: A survey, some research issues and challenges. IEEE Communications Surveys & Tutorials, 13(4), 524. doi:10.1109/SURV.2011.092311.00031.

    Article  Google Scholar 

  3. Guan, L., & Zhu, A. (2014). Green communications: Digital predistortion for wideband RF power amplifiers. IEEE Microwave Magazine, 15(7), 84. doi:10.1109/MMM.2014.2356037.

    Article  Google Scholar 

  4. Dubois, J., Djoko-Kouam, M., Skrzypczak, A. (2010). In 2010 international conference on wireless communications and signal processing (WCSP) (pp. 1–6). doi:10.1109/WCSP.2010.5630109.

  5. Hammi, O., Boumaiza, S., Jaidane-Saidane, M., & Ghannouchi, F. M. (2005). Digital subband filtering predistorter architecture for wireless transmitters. IEEE Transactions on Microwave Theory and Techniques, 53(5), 1643. doi:10.1109/TMTT.2005.847056.

    Article  Google Scholar 

  6. Hussein, M. A., & Venard, O. (2014). In 2014 IEEE international conference on acoustics, speech and signal processing (ICASSP) (pp. 1–5).

  7. Pham, D.-K. G., Desgreys, P., Loumeau, P., & Ridgers, T. (2012). Multi-stage noise band cancellation ΣΔ modulator for digitisation of distorted signals. Electronics Letters, 48(10), 560. doi:10.1049/el.2012.0533.

    Article  Google Scholar 

  8. Pham, D.-K. G., Desgreys, P., Loumeau, P., Ridgers, T., & Monnerie, G. (2013). High-level design of general multi-stage noise band cancellation ΣΔ ADC optimized for nonlinearly distorted signals. Analog Integrated Circuits and Signal Processing, 77(2), 235. doi:10.1007/s10470-013-0148-1.

    Article  Google Scholar 

  9. Schwingshackl, D., & Kubin, S. G. (2007). Polyphase representation of multirate nonlinear filters and its applications. IEEE Transactions on Signal Processing, 55(5), 2145. doi:10.1109/TSP.2007.892705.

    Article  MathSciNet  Google Scholar 

  10. Gharaibeh, K. (2011). Nonlinear Distortion in Wireless Systems: Modeling and Simulation with MATLAB. Chichester: Wiley.

    Book  Google Scholar 

  11. Ding, L., Zhou, G. T., Morgan, D. R., Ma, Z., Kenney, J. S., Kim, J., et al. (2004). A robust digital baseband predistorter constructed using memory polynomials. IEEE Transactions on Communications, 52(1), 159. doi:10.1109/TCOMM.2003.822188.

    Article  Google Scholar 

  12. Benabes, P., Beydoun, A., Javidan, M. (2009). In Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA’09) (pp. 1–4). doi:10.1109/NEWCAS.2009.5290513.

  13. Aziz, P., Sorensen, H., Van der Spiegel, J. (1994). In 1994 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), (Vol. 3, pp. III/249–III/252). Doi:10.1109/ICASSP.1994.390021.

  14. Vandenberghe, L. (2011). Ee133a—mathematics of design.

  15. Apolinário, J. A., & Miranda, M. (2009). QRD-RLS Adaptive Filtering (pp. 1–35). New York: Springer.

    MATH  Google Scholar 

  16. Ren, M. (2013). Cordic-based Givens QR decomposition for MIMO detectors. Master’s thesis, Georgia Institute of Technology. http://hdl.handle.net/1853/50256.

  17. Meher, P. K., Valls, J., Juang, T. B., Sridharan, K., & Maharatna, K. (2009). 50 years of CORDIC: Algorithms, architectures, and applications. IEEE Transactions on Circuits and Systems I: Regular Papers, 56(9), 1893. doi:10.1109/TCSI.2009.2025803.

    Article  MathSciNet  Google Scholar 

  18. A. Corporation. (2004). Implementation of cordic-based qrd-rls algorithm on altera stratix fpga with embedded nios soft processor technology.

  19. Xilinx. Cordic v6.0—logicore ip product guide (2015).

Download references

Acknowledgments

Thanks are due tox ReSMiQ for the partial support to this project and to the “Lidex-Nanodesign” project funded by the IDEX Paris-Saclay (ANR-11-IDEX-0003-02).

Author information

Authors and Affiliations

  1. Telecom ParisTech - CNRS LTCI UMR, 5141, Paris, France

    Dang-Kièn Germain Pham, Patricia Desgreys & Patrick Loumeau

  2. École de technologie supérieure, Montréal, QC, Canada

    Ghyslain Gagnon & François Gagnon

Authors
  1. Dang-Kièn Germain Pham
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Ghyslain Gagnon
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. François Gagnon
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Patricia Desgreys
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Patrick Loumeau
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Dang-Kièn Germain Pham.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Pham, DK.G., Gagnon, G., Gagnon, F. et al. Hardware implementation of subsampled adaptive subband digital predistortion algorithm. Analog Integr Circ Sig Process 89, 121–129 (2016). https://doi.org/10.1007/s10470-016-0791-4

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10470-016-0791-4

Keywords

Search

Navigation