Abstract
A high efficiency two-step capacitor switching scheme for a successive approximation register analogue-to-digital converter is presented. Two-step architecture, split capacitor array, C-2C dummy capacitor and multiple switching schemes are combined in the proposed switching scheme. The proposed switching scheme achieves a 99.75 % reduction in switching energy and the total capacitance is reduced 85.9 % compared with the conventional architecture.
References
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Acknowledgments
This work was supported by the National Natural Science Foundation of China (61234002, 61322405, 61306044 and 61376033), the National High-tech Program of China (2013AA014103).
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Ding, Z., Zhu, Z. High efficiency two-step capacitor switching scheme for SAR ADC. Analog Integr Circ Sig Process 86, 127–131 (2016). https://doi.org/10.1007/s10470-015-0652-6
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DOI: https://doi.org/10.1007/s10470-015-0652-6