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Analog encoded neural network for power management in MPSoC

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Abstract

Encoded neural networks (ENN) combine the principles of associative memories and error correcting decoders. Thus, they are good candidates to solve problems where decisions have to be made based on partial input information. This paper introduces an analog implementation of this new type of network to manage the power distribution in a Multiprocessor System-on-Chip (MPSoC). The proposed circuit has been designed for the 1 V supply ST CMOS 65 nm process, with a low complexity and low power consumption (less than 1 % of the MPSoC power). Compared to a digital counterpart based on game theory (GT), this analog solution consumes 6,800 times less energy and reacts 4,500 times faster. Thus, this analog circuit allows fully exploiting dynamic voltage and frequency scaling circuits switching capabilities to continuously adapt the power distribution of an MPSoC. From a given energy budget, GT saves 38 % while the analog ENN saves 60 %.

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Acknowledgments

This work was supported in part by the European Research Council (ERC-AdG2011 290901 NEUCOD).

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Authors and Affiliations

  1. Electronics Engineering Department, TELECOM Bretagne, Technopôle Brest Iroise, CS 83818, 29238, Brest Cedex 3, Brittany, France

    Benoit Larras, Cyril Lahuec, Matthieu Arzel & Fabrice Seguin

  2. Université Grenoble Alpes, 38000, Grenoble, France

    Bartosz Boguslawski & Frédéric Heitzmann

  3. CEA, LETI, MINATEC Campus, 38054, Grenoble, France

    Bartosz Boguslawski & Frédéric Heitzmann

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  1. Benoit Larras
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  2. Bartosz Boguslawski
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  3. Cyril Lahuec
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  4. Matthieu Arzel
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  5. Fabrice Seguin
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  6. Frédéric Heitzmann
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Correspondence to Cyril Lahuec.

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Larras, B., Boguslawski, B., Lahuec, C. et al. Analog encoded neural network for power management in MPSoC. Analog Integr Circ Sig Process 81, 595–605 (2014). https://doi.org/10.1007/s10470-014-0420-z

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  • DOI: https://doi.org/10.1007/s10470-014-0420-z

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