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A multi-band CMOS PLL-based frequency synthesizer for DRM/DRM+/DAB systems

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Abstract

A wideband frequency synthesizer is designed and fabricated in a 0.18 μm CMOS technology. It is developed for DRM/DRM+/DAB systems and is based on a programmable integer-N phase-locked loop. Instead of using several synthesizers for different bands, only one synthesizer is used, which has three separated divider paths to provide quadrature 8-phase LO signals. A wideband VCO covers a frequency band from 2.0 to 2.9 GHz, generates LO signals from 32 to 72 MHz, and from 250 to 362 MHz. In cooperation with a programmable XTAL multi-divider at the PLL input and output dividers at the PLL output, the frequency step can be altered from 1 to 25 kHz. It provides an average output phase noise of −80 dBc/Hz at 10 kHz offset, −95 dBc/Hz at 100 kHz offset, and −120 dBc/Hz at 1 MHz offset for all the supported channels. The output power of the LO signals is tunable from 0 dBm to +3 dBm, and the phase of quadrature signals can also be adjusted through a varactor in the output buffer. The power consumption of the frequency synthesizer is 45 mW from a 1.8 V supply.

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Acknowledgment

This work is partially supported by the National Natural Science Foundation of China (No. 61106024, No. 61201176), Special Fund of Jiangsu Province for the Transformation of Scientific and Technological Achievements (No. BA2011009), and the Specialized Research Fund for the Doctoral Program of Higher Education, China (No. 20090092120012). The authors wish to thank Keping Wang, Wei Li and Li Zhang for technical instructions. The authors also gratefully acknowledge the helpful comments and suggestions of the reviewers, which have improved the presentation.

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Correspondence to Zhigong Wang.

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Wang, J., Wang, Z., Xu, J. et al. A multi-band CMOS PLL-based frequency synthesizer for DRM/DRM+/DAB systems. Analog Integr Circ Sig Process 80, 293–304 (2014). https://doi.org/10.1007/s10470-014-0341-x

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  • DOI: https://doi.org/10.1007/s10470-014-0341-x

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