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Process development of a novel wafer level packaging with TSV applied in high-frequency range transmission

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Abstract

The process development of a novel wafer level packaging with TSV applied in high-frequency range transmission is presented. A specially designed TSV structure (a core TSV and six shielding TSVs) is adopted to connect the components on different sides of the high-resistivity silicon wafer. And the microstrip line in the microwave monolithic integrated circuit is used to transmit high-frequency signal in packaging structure together with the low permittivity intermediate dielectric polymer, benzocyclobutene. The TSV fabrication process and the multi-layer interconnection is illustrated in details. The electrical measurement result of the microstrip lines connected by TSVs reveals the resistances within 0.719 Ω, a return loss better than 23.8 dB and an insertion loss better than 2.60 dB from 14 to 40 GHz.

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References

  • Beica R, Siblerud P, Sharbono C, Bernt M (2008) Advanced metallization for 3D integration. In: Proceeding of 10th electronics packaging technology conference (ECTC 2008) 212–218

  • Ding XY, Geng F, Luo L (2009) Process development in metal/BCB multilayer interconnections of MMCM with embedded chip in Si substrate. Microelectron Eng 86:335–339. doi:10.1016/j.mee.2008.11.005

    Article  Google Scholar 

  • Fang C, Corre AL, Yon D (2011) Copper electroplating into deep microvias for the SiP application. Microelectron Eng 88:749–753. doi:10.1016/j.mee.2010.07.034

    Article  Google Scholar 

  • Ho SW, Yoon SW, Zhou Q, Pasad K, Kripesh V, Lau J (2008) High RF performance TSV silicon carrier for high frequency application. In: Proceeding of 58th electronic components and technology conference (ECTC 2008), pp 1946–1952

  • Jang DM, Ryu C, Lee KY, Cho BH, Kim J, Oh TS, Lee WJ, Yu J (2007) Development and evaluation of 3-D SiP with vertically interconnected through silicon vias (TSV). In: Proceeding of 57th electronic components and technology conference (ECTC 2007), pp 847–852

  • Kannan S, Evana SS, Gupta A, Kim B, Li L (2011) 3-D copper based TSV for 60-GHz applications. In: Proceeding of 61st electronic components and technology conference (ECTC 2011), pp 1168–1175

  • Kumagai K, Yoneda Y, Izumino H, Shimojo H, Sunohara M, Kurihara T, Higashi M, Mabuchi Y (2008) A silicon interposer BGA package with Cu-filled TSV and multi-layer Cu-plating interconnect. In: Proceeding of 58th electronic components and technology conference (ECTC 2008), pp 571–576

  • Lim TG, Khoo YM, Selvanayagam CS, Ho SW, Li R, Zhang XW, Shan G, Zhong XY (2011) Through silicon via interposer for millimetre wave applications. In: Proceeding of 61th electronic components and technology conference (ECTC 2011), pp 577–582

  • Seok S, Rolland N, Rolland P-A (2006) Packaging methodology for RF devices using a BCB membrane transfer technique. J Micromech Microeng 16:2384–2388. doi:10.1088/0960-1317/16/11/019

    Article  Google Scholar 

  • Tang JJ, Sun XW, Luo L (2011) A wafer-level multi-chip module process with thick photosensitive benzocyclobutene as the dielectric for microwave application. J Micromech Microeng 21 065035. doi:10.1088/0960-1317/21/6/065035

  • Tsui KYK, Yau SK, Leung VCK, Sun P, Shi DXQ (2009) Parametric study of electroplating-based via-filling process for tsv applications. In: 2009 International Conference on electronic packaging technology and high density packaging (ICEPT-HDP), pp 23–27

  • Tummala RR, Swaminathan M (2008) Introduction to system-on-package (SoP): miniaturization of the entire system. McGraw-Hill, USA, pp 81–144

    Google Scholar 

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Acknowledgments

This work is supported by National Major Fundamental Research Program of China (Grant No. 2009CB320207) and National Science and Technology Major Project—Research, Development and Industry of RDL/Embedding Wafer-Level Packaging and High-Density Bumping Technology (No. 2011ZX02602). The authors would also like to thank the support of Jiangsu Changjiang Electronics Technology Co., Ltd, Shanghai Anji Microelectronics Co., Ltd. and Shanghai Sinyang Semiconductor Materials Co., Ltd.

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Correspondence to Xiao Chen.

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Chen, X., Tang, J., Xu, G. et al. Process development of a novel wafer level packaging with TSV applied in high-frequency range transmission. Microsyst Technol 19, 483–491 (2013). https://doi.org/10.1007/s00542-012-1712-9

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  • DOI: https://doi.org/10.1007/s00542-012-1712-9

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