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An approach to systems verification

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Abstract

The term systems verification refers to the specification and verification of the components of a computing system, including compilers, assemblers, operating systems and hardware. We outline our approach to systems verification, and summarize the application of this approach to several systems components. These components consist of a code generator for a simple high-level language, an assembler and linking loader, a simple operating system kernel, and a microprocessor design.

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Bevier, W.R., Hunt, W.A., Moore, J.S. et al. An approach to systems verification. J Autom Reasoning 5, 411–428 (1989). https://doi.org/10.1007/BF00243131

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  • DOI: https://doi.org/10.1007/BF00243131

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