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Formation of solid-solution Cu-to-Cu joints using Ga solder and Pt under bump metallurgy for three-dimensional integrated circuits

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Abstract

Three-dimensional (3D) integrated circuits (ICs) are the most important packaging technology for next-generation semiconductors. Cu-to-Cu throughsilicon via interconnections with micro-bumps are key components in the fabrication of 3D ICs. However, significant reliability concerns have been raised due to the formation of brittle intermetallic compounds in the entire 3D IC joints. This study proposes a Ga-based Cu-to-Cu bonding technology with Pt under bump metallurgy (UBM). A systematic analysis of reactive wetting between Ga solders and polycrystalline, single-crystalline, and Ptcoated Cu substrates was conducted. Pt UBM as a wetting layer was identified to be a key component for Ga-based Cu-to-Cu bonding. Pt-coated Cu substrates were bonded using Ga solders with various Ga-to-Pt ratios (n) at 300℃. When n ≥ 4, the Cu/Pt/Ga/Pt/Cu interface evolves to Cu/facecentered cubic (fcc)/γ1-Cu9Ga4/fcc/Cu, Cu/fcc/γ1-Cu9Ga4 + Ga7Pt3/fcc/Cu, and finally Cu/fcc + Ga7Pt3/Cu structures. The desired ductile solid solution joint formed with discrete Ga7Pt3 precipitates. When n ≤ 1, a Cu/Ga7Pt3/Cu joint formed without Cu actively participating in the reactions. The reaction mechanism and microstructure evolution were elaborated with the aid of CALPHAD thermodynamic modeling.

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Authors and Affiliations

  1. Department of Materials Science and Engineering, National Cheng Kung University, Tainan, 70101, Taiwan

    Shih-kang Lin, Hao-miao Chang, Cheng-liang Cho, Yu-chen Liu & Yi-kai Kuo

  2. Center for Micro/Nano Science and Technology, National Cheng Kung University, Tainan, 70101, Taiwan

    Shih-kang Lin

Authors
  1. Shih-kang Lin
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  2. Hao-miao Chang
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  3. Cheng-liang Cho
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  4. Yu-chen Liu
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  5. Yi-kai Kuo
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Correspondence to Shih-kang Lin.

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Lin, Sk., Chang, Hm., Cho, Cl. et al. Formation of solid-solution Cu-to-Cu joints using Ga solder and Pt under bump metallurgy for three-dimensional integrated circuits. Electron. Mater. Lett. 11, 687–694 (2015). https://doi.org/10.1007/s13391-015-5015-z

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  • DOI: https://doi.org/10.1007/s13391-015-5015-z

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