Abstract
Virtualization is a convenient way to efficiently utilize the numerous on-chip resources in modern physical platforms. However, it is important to ensure a high performance for the workloads running on such virtualized platforms. One factor which reduces the performance of these virtualized workloads is the frequent flushing of hardware-managed Translation Lookaside Buffers (TLBs). To avoid these flushes and reduce the TLB miss rate, we propose the Tag Manager Table (TMT), a hardware architecture for generating and managing process-specific TLB tags. Since the TMT approach is software-transparent, it is equally applicable for virtualized and non-virtualized environments. Using a full-system simulation approach, we investigate the reduction in the TLB miss rate achieved by using the TMT. We also analyze the variation of this reduction with factors like the size of the TMT, the TLB architecture and the workload characteristics and estimate the relative importance of these factors in determining this reduction.
Similar content being viewed by others
References
Marty M.R., Hill M.D.: Virtual hierarchies to support server consolidation. SIGARCH Comput. Archit. News 35(2), 46–56 (2007)
Olukotun K., Nayfeh B.A., Hammond L., Wilson K., Chang K.: The case for a single-chip multiprocessor. SIGPLAN Notices 31(9), 2–11 (1996)
Figueiredo R., Dinda P., Fortes J.: Guest editors’ introduction: resource virtualization renaissance. Computer 38(5), 28–31 (2005)
Cherkasova L., Gupta D., Vahdat A.: Comparison of the three cpu schedulers in xen. SIGMETRICS Perform. Eval. Rev. 35(2), 42–51 (2007)
Santos, J.R., Turner, Y., Janakiraman, G., Pratt, I.: Bridging the gap between software and hardware techniques for I/O virtualization. In: ATC’08: USENIX 2008 Annual Technical Conference on Annual Technical Conference. USENIX Association, Berkeley, CA, USA, pp. 29–42 (2008)
Huang, W., Liu, J., Abali, B., Panda, D.K.: A case for high performance computing with virtual machines. In: ICS ’06: Proceedings of the 20th Annual International Conference on Supercomputing. ACM, New York, NY, USA, pp. 125–134 (2006)
Mergen M.F., Uhlig V., Krieger O., Xenidis J.: Virtualization for high-performance computing. SIGOPS Oper. Syst. Rev. 40(2), 8–11 (2006)
Itanium: [Online]. Available: http://en.wikipedia.org/wiki/Itanium#Market_share (2010)
Gartner: Gartner Says 16 Percent of Workloads are Running in Virtual Machines Today. [Online]. Available: http://www.gartner.com/it/page.jsp?id=1211813 (2010)
Uhlig R., Neiger G., Rodgers D., Santoni A., Martins F., Anderson A., Bennett S., Kagi A., Leung F., Smith L.: Intel virtualization technology. Computer 38(5), 48–56 (2005)
Abramson D., Jackson J., Muthrasanallur S., Neiger G., Regnier G., Sankaran R., Schoinas I., Uhlig R., Vembu B., Wiegert J.: Intel virtualization technology for directed I/O. Intel Technol. J. 10(03), 179–192 (2006)
Advanced Micro Devices: AMD-V Nested Paging. White paper, AMD (2008)
Advanced Micro Devices: AMD Secure Virtual Machine Architecture Reference Manual. Advanced Micro Devices (2008)
Drepper U.: The cost of virtualization. Queue 6(1), 28–35 (2008)
Neiger G., Santoni A., Leung F., Rodgers D., Uhlig R.: Intel virtualization technology: hardware support for efficient processor virtualization. Intel Technol. J. 10(3), 167–178 (2006)
SPARC International, Inc: The SPARC Architecture Manual Version 9. PTR Prentice Hall, Englewood Cliffs (1993)
Silicon Graphics, Inc: MIPS R4000 Microprocessor User’s Manual. PTR Prentice Hall, Englewood Cliffs (1993)
Compaq Computer Corporation: ALPHA Architecture Reference Manual. (2002)
Motorola Inc: PowerPC 601 RISC Microprocessor User’s Manual. (2002)
Liedtke, J.: Improved Address-Space Switching on Pentium Processors by Transparently Multiplexing User Address Spaces. Technical Report, German National Research Center for Information Technology (1995)
Uhlig, V., Dannowski, U., Skoglund, E., Haeberlen, A., Heiser, G.: Performance of Address-Space Multiplexing on the Pentium. Technical Repot, University of Karlsruhe. At http://ertos.nicta.com.au/publications/papers/Uhlig_DSHH_02.pdf (2002)
Biemeuller, S.: (2010) ASID Management in Xen AMD-V. [Online]. Available: http://xen.xensource.com/xensummit/xensummit_spring_2007.html
Tickoo, O., Kannan, H., Chadha, V., Illikkal, R.: qTLB: looking inside the look-aside buffer. In The 14th International Conference on High Performance Computing, December (2007)
Smith J., Nair R.: Virtual Machines: Versatile Platforms for Systems and Processes. Morgan Kaufmann Publishers Inc., Los Altos (2005)
Intel Corporation: Intel 64 and IA-32 Architectures Software Developer’s Manuals. Intel Corporation, Santa Clara, CA (2008)
Magnusson P.S., Christensson M., Eskilson J., Forsgren D., Hllberg G., Hgberg J., Larsson F., Moestedt A., Werner B.: Simics: a full system simulation platform. Computer 35(2), 50–58 (2002)
Virtutech Inc: Simics Reference Manual. Virtutech Inc, Stockholm, Sweden (2007)
Jones, S.T., Arpaci-Dusseau, A.C., Arpaci-Dusseau, R.H., Antfarm: tracking processes in a virtual machine environment. In: ATEC ’06: Proceedings of USENIX ’06 Annual Technical Conference, June (2006)
Barham, P., Dragovic, B., Fraser, K., Hand, S., Harris, T., Ho, A., Neugebauer, R., Pratt, I., Warfield, A.: Xen and the art of virtualization. In: SOSP ’03: Proceedings of the Nineteenth ACM Symposium on Operating Systems Principles, pp. 164–177 (2003)
Llanos D.R.: TPCC-UVa: an open-source TPC-C implementation for global performance measurement of computer systems. SIGMOD Rec. 35(4), 6–15 (2006)
Karlsson, M., Moore, K.E., Hagersten, E., Wood, D.A.: Memory system behavior of Java-based middleware. In: Proceedings of the 9th International Symposium on High-Performance Computer Architecture, February (2003)
Shuf, Y., Serrano, M.J., Gupta, M., Singh, J.P.: Characterizing the memory behavior of java workloads: a structured view and opportunities for optimizations. In: SIGMETRICS ’01: Proceedings of the 2001 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems. ACM, New York, NY, USA, pp. 194–205 (2001)
Adamson, A., Dagastine, D., Sarne, S.: SPECjbb2005—a year in the life of a Benchmark. In: 2007 SPEC Benchmark Workshop (2007)
Standard Performance Evaluation Corporation: (2010) 255.vortex SPEC CPU2000 Benchmark Description File. [Online]. Available: http://www.spec.org/cpu2000/CINT2000/255.vortex/docs/255.vortex.html
Georges A., Eeckhout L., Bosschere K.D.: Comparing low-level behavior of spec cpu and java workloads. Adv. Comput. Syst. Archit. 3740, 669–679 (2005)
Dague, S., Stekloff, D., Sailer, R.: (2010) xm(1)—Linux Man Page. [Online]. Available: http://linux.die.net/man/1/xm
Jain, R.: The Art of Computer Systems Performance Analysis: Techniques for Experimental Design, Measurement, Simulation, and Modeling. Wiley, New York (1991)
Author information
Authors and Affiliations
Corresponding author
Additional information
Donald Newell was affiliated with Intel Corporation during the time this research was conducted.
Rights and permissions
About this article
Cite this article
Venkatasubramanian, G., Figueiredo, R.J., Illikkal, R. et al. TMT: A TLB Tag Management Framework for Virtualized Platforms. Int J Parallel Prog 40, 353–380 (2012). https://doi.org/10.1007/s10766-011-0189-y
Received:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s10766-011-0189-y