Minimum-diameter cyclic arrangements in mapping data-flow graphs onto VLSI arrays
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Regular arrays of processing elements in VLSI have proved to be suitable for high-speed execution of many matrix operations. To execute an arbitrary computational algorithm on such processing arrays, it has been suggested mapping the given algorithm directly onto a regular array. The computational algorithm is represented by a data-flow graph whose nodes are to be mapped onto processors in the VLSI array.
This study examines the complexity of mapping data-flow graphs onto square and hexagonal arrays of processors. We specifically consider the problem of routing data from processors in a given (source) sequence to another (target) sequence.
We show that under certain conditions, the above problem is equivalent to the one of finding a minimum-diameter cyclic arrangement. The complexity of the latter problem is analyzed and upper and lower bounds on the number of intermediate rows of processors (between the source and target rows) are derived.
- Fisher, A. L.et al., Design of the PSC: A Programmable Systolic Chip,Proc. Third Caltech Conf. on VLSI, March 1983, pp. 287–302.
- Kung, S. Y. (1984) On Supercomputing with Systolic/Wavefront Array Processors. Proc. IEEE 72: pp. 867-884 CrossRef
- Li, G., Wah, B. W. (1985) The Design of Optimal Systolic Arrays. IEEE Trans. Comput. C-34: pp. 66-77 CrossRef
- Bokhari, S. H. (1981) On the Mapping Problem. IEEE Trans. Comput. C-30: pp. 207-214 CrossRef
- Koren, I., and Silberman, G. M., A Direct Mapping of Algorithms onto VLSI Processing Arrays Based on the Data Flow Approach,Proc. 12th International Conf. on Parallel Processing, August 1983, pp. 335–337.
- Special issue on Data Flow Systems,IEEE Comput., Vol. 15, No. 2, February 1982.
- Koren, I., Peled, I. (1987) The Concept and Implementation of Data-Driven Processor Arrays. IEEE Comput. 20: pp. 102-103
- Mendelson, B., and Silberman, G. M., Mapping Data Flow Programs on a VLSI Array of Processors,Proc. 14th International Symp. on Computer Architecture, Pittsburgh, PA, June 1987, pp. 72–80.
- Ackerman, W. B., Dennis, J. B. (1974) VAL—A Value-Oriented Algorithmic Language; Preliminary Reference Manual. Laboratory for Computer Science, Massachusetts Institute of Technology, Cambridge, MA
- Mizraian, A., Channel Routing in VLSI,Proc. 16th Annual ACM Symp. on Theory of Computing, 1984, pp. 101–107.
- Preparata, F. P., Lipski, W. (1984) Optimal Three-Layer Channel Routing. IEEE Trans. Comput. C-33: pp. 427-437 CrossRef
- Atallah, M. J., Hambrusch, S. E. (1986) Optimal Rotation Problems in Channel Routing. IEEE Trans. Comput. C-35: pp. 843-847 CrossRef
- Savage, J. E. (1983) Heuristics in the SLAP Layout System. Port Chester, New York
- Knuth, D. E. (1973) The Art of Computer Programming, Vol. 3. Addison-Wesley, Reading, MA
- Erdös, P., Linial, N., Moran, S. (1987) Extremal Problems on Permutations under Cyclic Equivalence. Discrete Math. 64: pp. 1-13 CrossRef
- Minimum-diameter cyclic arrangements in mapping data-flow graphs onto VLSI arrays
Mathematical systems theory
Volume 21, Issue 1 , pp 85-98
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- 1. Mathematical Institute of the Hungarian Academy of Sciences, Budapest, Hungary
- 2. Department of Electrical and Computer Engineering, University of Massachusetts, 01003, Amherst, MA, USA
- 3. Department of Computer Science, Technion-Israel Institute of Technology, 32000, Haifa, Israel