For the second time we propose a special issue of the Springer Analog Integrated Circuits and Signal Processing (ALOG) presenting the selection of best papers presented at the Second IEEE Latin American Symposium on Circuits and Systems (LASCAS 2010). The symposium was held in Bogota, Colombia 23rd to 25th of February 2011. The selected works represent important developments in electronic engineering at levels ranging from systems design methodologies to specific application circuits.

119 Papers from 27 countries were submitted to the conference. The review committee composed of 98 international experts accepted 62 papers and proposed a very interesting technical program presented in 11 sessions during the Conference. The main topics treated were: the high-level circuit design, CMOS digital circuit design, FPGA’s application, and analog circuit design. This second edition of the IEEE LASCAS has been attended by 128 participants from Asia, Europe and Americas.

Of the papers presented in the field of Analog Circuits and Signal Processing, 11 papers presented in this Special Issue were selected based on the evaluations of the Technical Committee members, the votes of participants and the respective session chairs; these papers were thoroughly revised and extended by the authors, and the final version of them are included in this issue.

These contributions are: (1) gate sizing using geometric programming; (2) optimizing transistor networks using a graph-based technique; (3) a multi-objective adaptive immune algorithm for multi-application NoC zapping; (4) analog circuit synthesis performing fast Pareto frontier exploration and analysis through 3D graphs; (5) synthesis and Comparison of low-power high-throughput architectures for SAD calculation; (6) design and characterization of a CMOS preamplifier for quantum well infrared photodetectors; (7) design procedure of a filter-antenna module implemented in substrate integrated waveguide technology; (8) mixed Cartesian feedback for Zero-IF WCDMA transmitter; (9) power efficient SDS motion estimation architecture using dynamic iteration control and hierarchical adder compressors for real time HDTV video coding; (10) hardware design focusing in the tradeoff cost versus quality for the H.264/AVC fractional motion estimation targeting high definition videos; (11) design of power efficient butterflies from Radix-2 DIT FFT using adder compressors with a new XOR gate topology.

This publication is an example of the interest of the global scientific community to find space to present their developments and provide a space for discussion anywhere in the world, and in this case supporting the creation of a world-class meeting of IEEE Circuits and Systems Society in Latin American territory thus supporting the rapidly growing scientific and technology developments in this region. This support was manifested in the collaboration of 267 volunteers, in partnership with the International Committee which evaluated the papers submitted to the conference, ensuring high technical level of the event. We highly praise their contribution. We would also like to recognize the efforts of all session chairs who contributed not only to the successful accomplishment of the event but also helped to select the works that are published in this issue.