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Fast unified elliptic curve point multiplication for NIST prime curves on FPGAs

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Abstract

Elliptic curve cryptography has been widely used in public key cryptography, which applies shorter keys to achieve the same security level of RSA cryptosystems. This communication advances a fast unified hardware architecture for elliptic curve point multiplication over NIST primes. The improvements of this work include word-based modular division, parallel point additions and doublings, and pipelined scalable multiplications and modular reductions. The hardware integrates computation for five NIST curves and can compute one time of NIST-192/224/256/384/521 elliptic curve point multiplication in 0.437/0.574/0.776/1.57/2.74 ms with Xilinx Virtex IV device, costing an area of 21,638 slices, 32 DSPs and 26 kbits of RAMs, which outperforms most results as far as we know.

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References

  1. Alrimeih, H., Rakhmatov, D.: Fast and flexible hardware support for ECC over multiple standard prime fields. IEEE Trans. VLSI Syst. 22(12), 2661–2674 (2014)

    Article  Google Scholar 

  2. Amiet, D., Curiger, A., Zbinden, P.: Flexible FPGA-based architectures for curve point multiplication over \({GF}(p)\). In: Euromicro Conference on Digital System Design, pp. 107–114 (2016)

  3. Ananyi, K., Alrimeih, H., Rakhmatov, D.: Flexible hardware processor for elliptic curve cryptography over NIST prime fields. IEEE Trans. Very Large Scale Integr. Syst. 17(8), 1099–1112 (2009)

    Article  Google Scholar 

  4. Bajard, J., Duquenne, S., Meloni, N.: Combining montgomery ladder for elliptic curves defined over \(F_p\) and RNS representation. Tech. rep., LIRMM (2006)

  5. Bigou, K., Tisserand, A.: Improving modular inversion in RNS using the plus-minus method. In: CHES. LNCS, vol. 8086, pp. 233–249 (2013)

    Chapter  Google Scholar 

  6. Bigou, K., Tisserand, A.: Binary-ternary plus–minus modular inversion in rns. IEEE Trans. Comput. 65(11), 3495–3501 (2016)

    Article  MathSciNet  Google Scholar 

  7. Chen, G., Bai, G., Chen, H.: A new systolic architecture for modular division. IEEE Trans. Comput. 56(2), 282–286 (2007)

    Article  MathSciNet  Google Scholar 

  8. Chung, S.C., Lee, J.W., Chang, H.C., Lee, C.Y.: A high-performance elliptic curve cryptographic processor over \(gf(p)\) with \(spa\) resistance. In: IEEE International Symposium on Circuits and Systems, pp. 1456–1459 (2012)

  9. Esmaeildoust, M., Schinianakis, D., Javashi, H., Stouraitis, T., Navi, K.: Efficient RNS implementation of elliptic curve point multiplication over \({GF}(p)\). IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 21(8), 1545–1549 (2013)

    Article  Google Scholar 

  10. Feng, X., Li, S.: A high-speed and SPA-resistant implementation of ECC point multiplication over \(GF(p)\). In: IEEE Trustcom/BigDataSE/ICESS, pp. 255–260 (2017)

  11. Guillermin, N.: A high speed coprocessor for elliptic curve scalar multiplications over \(F_p\). In: International Workshop on Cryptographic Hardware and Embedded Software. LNCS, vol. 6225, pp. 48–64 (2010)

  12. Güneysu, T., Paar, C.: Ultra high performance ECC over NIST primes on commercial FPGAs. In: Workshop on Cryptographic Hardware and Embedded Systems (CHES). LNCS, vol. 5154, pp. 62–78. Springer (2008)

  13. Hankerson, D., Menezes, A., Vanstone, S.: Guide to Elliptic Curve Cryptography. Springer, New York (2004)

    MATH  Google Scholar 

  14. Jeong, Y.J., Burleson, W.P.: VLSI array algorithms and architectures for RSA modular multiplication. IEEE Trans. Very Large Scale Integr. Syst. 5(2), 211–217 (1997)

    Article  Google Scholar 

  15. Koblitz, N.: Elliptic curve cryptosystems. Math. Comput. 48(177), 203–209 (1987)

    Article  MathSciNet  Google Scholar 

  16. Loi, K.C.C., Ko, S.B.: Scalable elliptic curve cryptosystem FPGA processor for nist prime curves. IEEE Trans. VLSI Syst. 23(11), 2753–2756 (2015)

    Article  Google Scholar 

  17. Ma, Y., Liu, Z., Pan, W., Jing, J.: A high-speed elliptic curve cryptographic processor for generic curves over \({\rm GF} (p)\). In: International Conference on Selected Areas in Cryptography, pp. 421–437. Springer, Berlin, Heidelberg (2013)

  18. Mahdizadeh, H., Masoumi, M.: Novel architecture for efficient FPGA implementation of elliptic curve cryptographic processor over \(gf(2^{163})\). IEEE Trans. VLSI Syst. 21(12), 2330–2333 (2013)

    Article  Google Scholar 

  19. Marzouqi, H., Al-Qutayri, M., Salah, K., Schinianakis, D., Stouraitis, T.: A high-speed FPGA implementation of an RSD-based ECC processor. IEEE Trans. VLSI Syst. 24(1), 151–164 (2016)

    Article  Google Scholar 

  20. Miller, V.: Use of elliptic curves in cryptography. In: Advances in Cryptology–CRYPTO’85. LNCS, vol. 218, pp. 417–426 (1986)

  21. Montgomery, P.: Speeding the pollard and elliptic curve methods of factorization. Math. Comput. 48(177), 243–264 (1987)

    Article  MathSciNet  Google Scholar 

  22. Rafferty, C., O’Neill, M., Hanley, N.: Evaluation of large integer multiplication methods on hardware. IEEE Trans. Comput. 66(8), 1369–1382 (2017)

    Article  MathSciNet  Google Scholar 

  23. Silverman, J.H.: A Friendly Introduction to Number Theory, 3rd edn. China Machine Press, Beijing (2006)

    Google Scholar 

  24. Takagi, N.: A VLSI algorithm for modular division based on the binary GCD algorithm. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. E81–A(5), 724–728 (1998)

    Google Scholar 

  25. Tenca, A., KoÇ, Ç.: Scalable architecture for Montgomery multiplication. In: KoÇ Ç., Paar C. (eds.) First International Workshop on Cryptographic Hardware and Embedded Systems (CHES’99), pp. 94–108 (1999)

  26. Wu, T.: Elliptic curve \(GF(p)\) point multiplier by dual arithmetic cores. In: IEEE International Conference on ASIC, pp. 519–522 (2015)

  27. Wu, T., Li, S., Litian-Liu: Modular multiplier by folding Barrett modular reduction. In: IEEE 11th International Conference on Solid-State and Integrated Circuit Technology(ICSICT), pp. 1–3 (2012)

  28. Wu, T., Li, S., Liu, L.: Fast RSA decryption through high-radix scalable montgomery modular multipliers. Sci. China Inf. Sci. 58(6), 062401 (2015)

    Article  Google Scholar 

Download references

Acknowledgements

The author would like to thank the comments of editors and reviewers. This work is partly supported by Shenzhen postdoctoral financial aid, and Guangdong engineering research center for healthy living.

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Correspondence to Tao Wu.

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Wu, T., Wang, R. Fast unified elliptic curve point multiplication for NIST prime curves on FPGAs. J Cryptogr Eng 9, 401–410 (2019). https://doi.org/10.1007/s13389-019-00211-9

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