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A hybrid DAC switching technique for SAR ADCs

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Abstract

In recent years, the area of Wireless Sensor Networks has seen a tremendous growth and is instrumental in a multitude of applications ranging from health monitoring to geo fencing. Analog-to-Digital Converters (ADCs) are vital to any low-cost, energy-efficient sensor node in that they convert the sensed signal into its digital counterpart, which is then used processed by the digital circuitry. In this paper, a Capacitive Digital-to-Analog Converter (CDAC) switching technique is proposed that is aimed toward the design of an energy-efficient ADC. The presented switching technique is \(97.85\%\) more energy-efficient than the traditional CDAC architecture. Besides its energy efficiency, the technique reduces the overall size of the CDAC and its settling time. Theoretical analysis has been presented along with detailed simulation results as a proof of concept.

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References

  1. Akyildiz, I. F., Weilian, Su, Sankarasubramaniam, Y., & Cayirci, E. (2002). A survey on sensor networks. IEEE Communications Magazine, 40(8), 102–114.

    Article  Google Scholar 

  2. Chong, Chee-Yee, & Kumar, S. P. (2003). Sensor networks: Evolution, opportunities, and challenges. Proceedings of the IEEE, 91(8), 1247–1256.

    Article  Google Scholar 

  3. Raghunathan, V., Schurgers, C., Park, Sung, & Srivastava, M. B. (2002). Energy-aware wireless microsensor networks. IEEE Signal Processing Magazine, 19(2), 40–50.

    Article  Google Scholar 

  4. Van Elzakker, M., Van Tuijl, E., Geraedts, P., Schinkel, D., Klumperink, E. A. M., & Nauta, B. (2010). A 10-bit Charge-Redistribution ADC Consuming 1.9 \(\mu \text{ W }\) at 1 MS/s. IEEE Journal of Solid-State Circuits, 45(5), 1007–1015.

    Article  Google Scholar 

  5. Zhang, D., Bhide, A., & Alvandpour, A. (2012). A 53-nW 9.1-ENOB 1-kS/s SAR ADC in 0.13-\(\mu \text{ m }\) CMOS for medical implant devices. IEEE Journal of Solid-State Circuits, 47(7), 1585–1593.

    Article  Google Scholar 

  6. Lu, T. C., Van, L. D., Lin, C. S., & Huang, C. M. (2011). A 0.5V 1KS/s 2.5nW 8.52-ENOB 6.8fJ/conversion-step SAR ADC for biomedical applications. In IEEE custom integrated circuits conference, (pp. 1–4).

  7. Tai, H. Y., Hu, Y. S., Chen, H. W., & Chen, H. S. (2014). A 0.85fJ/conversion-step 10b 200kS/s subranging SAR ADC in 40nm CMOS. In IEEE international solid-state circuits conference digest of technical papers, (pp. 196–197).

  8. McCreary, J. L., & Gray, P. R. (1975). All-MOS charge redistribution analog-to-digital conversion techniques I. IEEE Journal of Solid-State Circuits, 10(6), 371–379.

    Article  Google Scholar 

  9. Ginsburg, B. P., & Chandrakasan, A. P. (2005). An energy-efficient charge recycling approach for a SAR converter with capacitive DAC. In IEEE international symposium of circuits and systems, (pp. 184–187).

  10. Hariprasath, V., Guerber, J., Lee, S.-H., & Moon, U.-K. (2010). Merged capacitor switching based SAR ADC with highest switching energy-efficiency. Electronics Letters, 46(9), 620–621.

    Article  Google Scholar 

  11. Guerber, J., Venkatram, H., Oh, T., & Moon, U. K. (2012). Enhanced SAR ADC energy efficiency from the early reset merged capacitor switching algorithm. IEEE international symposium of circuits and systems, (pp. 2361–2364).

  12. Yip, M., & Chandrakasan, A. P. (2013). A resolution-reconfigurable 5-to-10-bit 0.4-to-1 V power scalable SAR ADC for sensor applications. IEEE Journal of Solid-State Circuits, 48(6), 1453–1464.

    Article  Google Scholar 

  13. Zhu, Z., Xiao, Y., & Song, X. (2013). \({V}_{CM}\)-based monotonic capacitor switching scheme for SAR ADC. Electronics Letters, 49(5), 327–329.

    Article  Google Scholar 

  14. Xie, L., Wen, G., Liu, J., & Wang, Y. (2014). Energy-efficient hybrid capacitor switching scheme for SAR ADC. Electronics Letters, 50(1), 22–23.

    Article  Google Scholar 

  15. Rahimi, E., & Yavari, M. (2014). Energy-efficient high-accuracy switching method for SAR ADCs. Electronics Letters, 50(7), 499–501.

    Article  Google Scholar 

  16. Sanyal, A., & Sun, N. (2014). An energy-efficient low frequency-dependence switching technique for SAR ADCs. IEEE Transactions on Circuits and Systems II, 61(5), 294–298.

    Article  Google Scholar 

  17. Lee, J. S., & Park, I. C. (2008). Capacitor array structure and switch control for energy-efficient SAR analog-to-digital converters. In IEEE international symposium on circuits and systems, (pp. 236–239).

  18. Srinivasan, S. R., & Balsara, P. T. (2014). Energy-efficient sub-DAC merging scheme for variable resolution SAR ADC. Electronics Letters, 50(4), 1421–1423.

    Article  Google Scholar 

  19. Miyahara, M., Asada, Y., Paik, D., & Matsuzawa, A. (2008). A low-noise self-calibrating dynamic comparator for high-speed ADCs. In IEEE asian solid-state circuits conference. (pp. 269–272).

  20. Zhu, Z., & Liang, Y. (2015). A 0.6-V 38-nW 9.4-ENOB 20-kS/s SAR ADC in 0.18\(\mu\)m CMOS for medical implant devices. IEEE Transactions on Circuits and Systems I: Regular Papers, 62(9), 2167–2176.

    Article  Google Scholar 

  21. Liu, S., Shen, Y., & Zhu, Z. (2016). A \(12-Bit 10 MS/s\) SAR ADC with high linearity and energy-efficient switching. IEEE Transactions on Circuits and Systems I: Regular Papers, (99), 1–12.

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Correspondence to Sharath R. Srinivasan.

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Srinivasan, S.R., Balsara, P.T. A hybrid DAC switching technique for SAR ADCs. Analog Integr Circ Sig Process 92, 179–187 (2017). https://doi.org/10.1007/s10470-017-0974-7

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  • DOI: https://doi.org/10.1007/s10470-017-0974-7

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