Skip to main content

Assignment of the Internal States (Asynchronous Sequential Systems)

  • Chapter
Switching Machines
  • 45 Accesses

Abstract

In Chapters 6, 7, 8, the synthesis of a sequential machine was performed from imposed specifications and a simple form of representation (the most compact form possible) was obtained by reduction processes.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 129.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

Bibliography

  1. Huffman, D. A., ‘The Synthesis of Sequential Switching Circuits’, Franklin Institute 257(1954).

    Google Scholar 

  2. Caldwell, S. H., Switching Circuits and Logical Design, Wiley, New York, U.S.A., 1958, pp. 524–72.

    Google Scholar 

  3. Huffman, D. A., ‘A Study of the Memory Requirements of Sequential Switching Circuits’, Technical J. Rep. 293, Research Laboratory of Electronics, Massachusetts Institute of Technology, Cambridge, Mass., U.S.A., 1955.

    Google Scholar 

  4. Marcus, M. P., Switching Circuits for Engineers, Prentice Hall, Englewood Cliff, N.J., U.S.A., 1962.

    Google Scholar 

  5. Elsey, J., ‘An Algorithm for the Synthesis of Large Sequential Switching Circuits’, Report R. 169, Coordinated Science Laboratory, University of Illinois, Urbana, 111., U.S.A.

    Google Scholar 

  6. Galimberti. R. and Morpurgo, R. M., ‘Une methode heuristique pour le codage des etats secondaires dans les réseaux séquentiels asynchrones’, in Algébre de Boole et machines logiques (ed. by P. Naslin and J. Kuntzman ), Dunod, Paris, 1966.

    Google Scholar 

  7. Saucier, G., ‘Etude des conages des tableaux d’etat des systemes sequentiels asynchrones’, in Algebre de Boole et machines logiques (ed. by P. Naslin and J. Kuntzman ), Dunod, Paris, 1966.

    Google Scholar 

  8. Naslin, P., an Kuntzman, J., Algebre de Boole et machines logiques, Dunod, Paris, 1967.

    Google Scholar 

Download references

Authors

Rights and permissions

Reprints and permissions

Copyright information

© 1972 D. Reidel Publishing Company, Dordrecht, Holland

About this chapter

Cite this chapter

Perrin, JP., Denouette, M., Daclin, E. (1972). Assignment of the Internal States (Asynchronous Sequential Systems). In: Switching Machines. Springer, Dordrecht. https://doi.org/10.1007/978-94-010-2867-7_3

Download citation

  • DOI: https://doi.org/10.1007/978-94-010-2867-7_3

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-94-010-2869-1

  • Online ISBN: 978-94-010-2867-7

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics