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Mitigating Electromigration in Physical Design

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Fundamentals of Electromigration-Aware Integrated Circuit Design

Abstract

The goal of this chapter is to summarize the state-of-the-art in EM-mitigating effects. Sections 4.24.7 describe in detail all known EM-inhibiting effects upon which an “electromigration awareness” is based. We also consider material-related options to reduce EM, like surface passivation (Sect. 4.8), and the use of EM-robust materials, such as carbon nanotubes (Sect. 4.9). We determine parameters for every measure, which enable them to be used easily; we also provide detailed advice for applying each method. We show how approved current densities can thus be increased at critical points, for example, by means of local layout modifications. The presented measures provide circuit designers with a suite of options to prevent electromigration damage in present, and future, technology nodes. Ultimately, the challenge is to avoid exceeding permissible current densities by selectively increasing the permissible boundaries.

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Notes

  1. 1.

    When carbon bonds, the shape of the “p” orbitals will change to a different shape to allow for less repulsion between electrons. For a carbon with one double bond and two single bonds, the orbitals will become 33% “s” and 67% “p”, making it “sp2”. Hence, the term “sp2” indicates that one S shell mixes with two P shells.

References

  1. N. Alam, A.K. Kureshi, M. Hasan, et al., Analysis of carbon nanotube interconnects and their comparison with Cu interconnects, in IMPACT ’09 (2009), pp. 124–127. https://doi.org/10.1109/mspct.2009.5164190

  2. N.D. Arora, Modeling and characterization of copper interconnects for SoC Design, in International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (2003), pp. 1–6. https://doi.org/10.1109/sispad.2003.1233622

  3. L. Aryasomayajula, R. Rieske, K.-J. Wolter, Application of copper-carbon nanotubes composite in packaging interconnects, in 34th International Spring Seminar on Electronics Technology (ISSE) (2011), pp. 531–536. https://doi.org/10.1109/isse.2011.6053943

  4. P. Beiss, Non-ferrous materials, in Powder Metallurgy Data, ed. by P. Beiss, R. Ruthardt, H. Warlimont. Landolt-Börnstein—Group VIII Advanced Materials and Technologies, vol. 2A1 (Springer, 2003), pp. 460–470. https://doi.org/10.1007/10689123_23

    Chapter  Google Scholar 

  5. S. Bellucci, Carbon nanotubes: physics and applications. Phys. Status Solidi (c), 2(1), 34–47 (2005). https://doi.org/10.1002/pssc.200460105

    Article  Google Scholar 

  6. J. Bass, K.H. Fischer, Metals: electronic transport phenomena, in Landolt-Börnstein—Numerical Data and Functional Relationships in Science and Technology, ed. by J.L. Olsen, K.-H. Hellwege. Group III Condensed Matter, vol. 15A (Springer, 1983). https://doi.org/10.1007/b29240

  7. S. Bigalke, J. Lienig, Load-aware redundant via insertion for electromigration avoidance, in Proceedings of the International Symposium on Physical Design (ISPD 2016), pp. 99–106. https://doi.org/10.1145/2872334.2872355

  8. I.A. Blech, Electromigration in thin aluminum films on titanium nitride. J. Appl. Phys. 47(4), 1203–1208 (1976). https://doi.org/10.1063/1.322842

    Article  Google Scholar 

  9. K. Banerjee, N. Srivastava, Are carbon nanotubes the future of VLSI interconnections? in Proceedings of the Design Automation Conference (DAC) (2006), pp. 809–814. https://doi.org/10.1145/1146909.1147116

  10. C. Berger, Y. Yi, Z.L. Wang, et al., Multiwalled carbon nanotubes are ballistic conductors at room temperature. Appl. Phys. A 74, 363 (2002). https://doi.org/10.1007/s003390201279

    Article  Google Scholar 

  11. Y. Chai, P.C.H. Chan, High electromigration-resistant copper/carbon nanotube composite for interconnect application, in 2008 IEEE International Electron Devices Meeting (IEDM) (2008), pp. 1–4. https://doi.org/10.1109/iedm.2008.4796764

  12. Y. Chai, Fabrication and Characterization of Carbon Nanotubes for Interconnect Applications. Ph.D. thesis, Hong Kong University of Science and Technology, Hong Kong (2009)

    Google Scholar 

  13. Y. Chai, A. Hazeghi, K. Takei, et al., Low-resistance electrical contact to carbon nanotubes with graphitic interfacial layer. IEEE Trans. Electron Devices 59(1), 12–19 (2012). https://doi.org/10.1109/TED.2011.2170216

    Article  Google Scholar 

  14. T.-F. Chang, T.-C. Kan, S.-H. Yang, et al., Enhanced redundant via insertion with multi-via mechanisms, in IEEE Computer Society Annual Symposium on VLSI (ISVLSI) (2011), pp. 218–223. https://doi.org/10.1109/isvlsi.2011.50

  15. H. Chang, Y.-C. Lu, S.-M. Jang, Self-aligned dielectric cap. U.S. Patent App. 11/747,105 (2008)

    Google Scholar 

  16. H. Ceric, S. Selberherr, Electromigration in submicron interconnect features of integrated circuits. Mater. Sci. Eng.: R: Rep. 71(5–6), 53–86 (2011). https://doi.org/10.1016/j.mser.2010.09.001

    Article  Google Scholar 

  17. Y. Chai, M. Sun, Z. Xiao, et al., Pursuit of future interconnect technology with aligned carbon nanotube arrays. IEEE Nanatechnol. Mag. 5(1), 22–26 (2011). https://doi.org/10.1109/MNANO.2010.939831

    Article  Google Scholar 

  18. C.W. Chang, Z.-S. Choi, C.V. Thompson, et al., Electromigration resistance in a short three-contact interconnect tree. J. Appl. Phys. 99(9), 094505 (2006). https://doi.org/10.1063/1.2196114

    Article  Google Scholar 

  19. J.S. Clarke, C. George, C. Jezewski, et al., Process technology scaling in an increasingly interconnect dominated world, in Symposium on VLSI Technology Digest of Technical Papers (2014), pp. 142–143. https://doi.org/10.1109/VLSIT.2014.6894407

  20. J.A. Davis, V.K. De, J.D. Meindl, A priori wiring estimations and optimal multilevel wiring networks for portable ULSI systems, in Proceedings of the Electronic Components and Technology Conference (1996), pp. 1002–1008. https://doi.org/10.1109/ectc.1996.550516

  21. R.L. de Orio, H. Ceric, S. Carniello, et al., Analysis of electromigration in redundant vias, in International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (2008), pp. 237–240. https://doi.org/10.1109/sispad.2008.4648281

  22. I. De Munari, A. Scorzoni, F. Tamarri, et al., Activation energy in the early stage of electromigration in AI–1% Si/TiN/Ti bamboo lines. Semicond. Sci. Technol. 10, 255–259 (1995). https://doi.org/10.1088/0268-1242/10/3/004

    Article  Google Scholar 

  23. P. Ehrhart, P. Jung, H. Schultz, et al., Atomic defects in metals, in Landolt-Börnstein, Numerical Data and Functional Relationships in Science and Technology, ed. by H. Ullmaier. Group III: Crystal and Solid State Physics, vol. 25 (Springer, 1991). https://doi.org/10.1007/b37800

  24. A. von Glasow, Zuverlässigkeitsaspekte von Kupfermetallisierungen in Integrierten Schaltungen. Ph.D. thesis, TU Munich (2005)

    Google Scholar 

  25. T. Gupta, Copper Interconnect Technology (Springer, 2009). https://doi.org/10.1007/978-1-4419-0076-0

    Book  Google Scholar 

  26. M.S. Hefeida, M.H. Chowdhury, Interconnect wire length estimation for stochastic wiring distributions, in International Conference on Microelectronics (2008), pp. 369–372. https://doi.org/10.1109/icm.2008.5393767

  27. C.-K. Hu, L. Gignac, R. Rosenberg, et al., Reduced Cu interface diffusion by CoWP surface coating. Microelectron. Eng. 70(2–4), 406–411 (2003). https://doi.org/10.1016/S0167-9317(03)00286-7

    Article  Google Scholar 

  28. C.-K. Hu, L. Gignac, R. Rosenberg, Electromigration of Cu/low dielectric constant interconnects. Microelectron. Reliab. 46(2–4), 213–231 (2006). https://doi.org/10.1016/j.microrel.2005.05.015

    Article  Google Scholar 

  29. H. Haznedar, M. Gall, V. Zolotov, et al., Impact of stress-induced backflow on full-chip electromigration risk assessment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(6), 1038–1046 (2006). https://doi.org/10.1109/tcad.2005.855941

    Article  Google Scholar 

  30. J. Hohage, M.U. Lehr, V. Kahlert, A copper-dielectric cap interface with high resistance to electromigration for high performance semiconductor devices. Microelectron. Eng. 86(3), 408–413 (2009). https://doi.org/10.1016/j.mee.2008.12.012

    Article  Google Scholar 

  31. H.H. Hoang, Effects of annealing temperature on electromigration performance of multilayer metallization systems, in Proceedings of the 26th Annual International Reliability Physics Symposium (1988), pp. 173–178. https://doi.org/10.1109/relphy.1988.23446

  32. C.-K. Hu, J. Ohm, L.M. Gignac, et al., Electromigration in Cu(Al) and Cu(Mn) damascene lines. J. Appl. Phys. 111(9), 093722–093722-6 (2012). https://doi.org/10.1063/1.4711070

    Article  Google Scholar 

  33. C.-K. Hu, R. Rosenberg, K.Y. Lee, Electromigration path in Cu thin-film lines. Appl. Phys. Lett. 74(20), 2945–2947 (1999). https://doi.org/10.1063/1.123974

    Article  Google Scholar 

  34. C.S. Hau-Riege, A.P. Marathe, Z.-S. Choi, The effect of current direction on the electromigration in short-lines with reservoirs, in IEEE International Reliability Physics Symposium (IRPS) (2008), pp. 381–384. https://doi.org/10.1109/relphy.2008.4558916

  35. C.S. Hau-Riege, C.V. Thompson, Electromigration in Cu interconnects with very different grain structures. Appl. Phys. Lett. 78(22), 3451–3453 (2001). https://doi.org/10.1063/1.1355304

    Article  Google Scholar 

  36. International Technology Roadmap for Semiconductors (ITRS), 2013 edn. (2014). http://www.itrs2.net/itrs-reports.html. Last retrieved on 1 Jan 2018

  37. International Technology Roadmap for Semiconductors 2.0 (ITRS 2.0), 2015 edn. (2016). http://www.itrs2.net/itrs-reports.html. Last retrieved on 1 Jan 2018

  38. H. Jiang, B. Liu, Y. Huang, et al., Thermal expansion of single wall carbon nanotubes. J. Eng. Mater. Technol. 126, 265–270 (2004). https://doi.org/10.1115/1.1752925

    Article  Google Scholar 

  39. Y.-C. Joo, C.V. Thompson, Electromigration-induced transgranular failure mechanisms in single-crystal aluminum interconnects. J. Appl. Phys. 81(9), 6062–6072 (1997). https://doi.org/10.1063/1.364454

    Article  Google Scholar 

  40. B.D. Knowlton, J.J. Clement, C.V. Thompson, Simulation of the effects of grain structure and grain growth on electromigration and the reliability of interconnects. J. Appl. Phys. 81(9), 6073–6080 (1997). https://doi.org/10.1063/1.364446

    Article  Google Scholar 

  41. S. Kim, D.D. Kulkarni, K. Rykaczewski, et al., Fabrication of an ultralow-resistance ohmic contact to MWCNT-metal interconnect using graphitic carbon by Electron Beam-Induced Deposition (EBID). IEEE Trans. Nanotechnol. 11, 1223 (2012). https://doi.org/10.1109/TNANO.2012.2220377

  42. A.B. Kahng, G. Robins, A. Singh, et al., Filling and slotting: analysis and algorithm. Tech. Rep., UCLA, Los Angeles, CA, University of Virginia, Charlottesville, VA (1997)

    Google Scholar 

  43. J. Kludt, K. Weide-Zaage, M. Ackermann, et al., Characterization of a new designed octahedron slotted metal track by simulations, in 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE) (2013), pp. 1–5. https://doi.org/10.1109/eurosime.2013.6529907

  44. P. Lamontagne, L. Doyen, E. Petitprez, et al., CU interconnect immortality criterion based on electromigration void growth saturation, in IEEE International Integrated Reliability Workshop Final Report (2009), pp. 56–59. https://doi.org/10.1109/irws.2009.5383034

  45. A.R. Lavoie, F. Gstrein, Self-aligned cap and barrier. U.S. Patent App. 12/165,016 (2009)

    Google Scholar 

  46. J. Lienig, Interconnect and current density stress—an introduction to electromigration-aware design, in Proceedings of 2005 International Workshop on System Level Interconnect Prediction (SLIP) (2005), pp. 81–88. https://doi.org/10.1145/1053355.1053374

  47. J. Lienig, Introduction to electromigration-aware physical design, in Proceedings of the International Symposium on Physical Design (ISPD 2006), pp. 39–46. https://doi.org/10.1145/1123008.1123017

  48. P. Lamontagne, D. Ney, Y. Wouters, Effect of reservoir on electromigration of short interconnects, in IEEE International Integrated Reliability Workshop Final Report (IRW) (2010), pp. 46–50. https://doi.org/10.1109/iirw.2010.5706484

  49. B.S. Landman, R.L. Russo, On a pin versus block relationship for partitions of logic graphs. IEEE Trans. Comput. C-20(12), 1469–1479 (1971). https://doi.org/10.1109/t-c.1971.223159

    Article  Google Scholar 

  50. W.B. Loh, M.S. Tse, L. Chan, et al., Wafer-level electromigration reliability test for deep-submicron interconnect metallization, in Proceedings of the IEEE Hong Kong Electron Devices Meeting (1998), pp. 157–160. https://doi.org/10.1109/hkedm.1998.740210

  51. J. Li, Q. Ye, A. Cassell, et al., Bottom-up approach for carbon nanotube interconnects. Appl. Phys. Lett. 82(15), 2491–2493 (2003). https://doi.org/10.1063/1.1566791

    Article  Google Scholar 

  52. S. Li, Z. Yu, S.-F. Yen, et al., Carbon nanotube transistor operation at 2.6 GHz. Nano Lett. 4, 753 (2004). https://doi.org/10.1021/nl0498740

    Article  Google Scholar 

  53. H. Mario, C.L. Gan, Y.K. Lim, et al., Effects of side reservoirs on the electromigration lifetime of copper interconnects, in 18th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) (2011), pp. 1–4. https://doi.org/10.1109/ipfa.2011.5992779

  54. F. Matsuoka, H. Iwai, K. Hama, et al., Electromigration reliability for a tungsten-filled via hole structure. IEEE Trans. Electron Devices 37(3), 562–568 (1990). https://doi.org/10.1109/16.47758

    Article  Google Scholar 

  55. A. Marras, M. Impronta, I. De Munari, et al., Reliability assessment of multi-via Cu-damascene structures by wafer-level isothermal electromigration tests. Microelectron. Reliab. 47(9–11), 1492–1496 (2007). https://doi.org/10.1016/j.microrel.2007.07.002

    Article  Google Scholar 

  56. A.M. Marconnet, M.A. Panzer, K.E. Goodson, Thermal conduction phenomena in carbon nanotubes and related nanostructured materials. Rev. Modern Phys. 85, 1295 (2013). https://doi.org/10.1103/RevModPhys.85.1295

    Article  Google Scholar 

  57. M. Meo, M. Rossi, Prediction of Young’s modulus of single wall carbon nanotubes by molecular-mechanics based finite element modelling. Compos. Sci. Technol. 66(11–12), 1597–1605 (2006). https://doi.org/10.1016/j.compscitech.2005.11.015

    Article  Google Scholar 

  58. V. Mishra, S.S. Sapatnekar, The impact of electromigration in copper interconnects on power grid integrity, in Proceedings of the Design Automation Conference (DAC) (2013), pp. 1–6. https://doi.org/10.1145/2463209.2488842

  59. H.V. Nguyen, C. Salm, T.J. Mouthaan, et al., Modeling of the reservoir effect on electromigration lifetime, in Proceedings of the International Symposium on the Physical & Failure Analysis of Integrated Circuits (2001), pp. 169–173. https://doi.org/10.1109/ipfa.2001.941479

  60. E. Ogawa, K.-D. Lee, H. Matsuhashi, et al., Statistics of electromigration early failures in Cu/oxide dual-damascene interconnects, in Proceedings of the 39th Annual IEEE International Reliability Physics Symposium (2001), pp. 341–349. https://doi.org/10.1109/relphy.2001.922925

  61. Y.-J. Park, V.K. Andleigh, C.V. Thompson, Simulations of stress evolution and the current density scaling of electromigration-induced failure times in pure and alloyed interconnects. J. Appl. Phys. 85(7), 3546–3555 (1999). https://doi.org/10.1063/1.369714

    Article  Google Scholar 

  62. J.-Y. Park, S. Rosenblatt, Y. Yaish, et al., Electron-phonon scattering in metallic single-walled carbon nanotubes. Nano Lett. 4(3), 517–520 (2004). https://doi.org/10.1021/nl035258c

    Article  Google Scholar 

  63. M.S. Purewal, B.H. Hong, A. Ravi, et al., Scaling of resistance and electron mean free path of single-walled carbon nanotubes. Phys. Rev. Lett. 98, 186808 (2007). https://doi.org/10.1103/PhysRevLett.98.186808

  64. G. Qiang, L.K. Foo, Z. Xu, et al., Step like degradation profile of electromigration of W-plug contact, in IEEE International Interconnect Technology Conference (1999), pp. 44–46. https://doi.org/10.1109/iitc.1999.787073

  65. N. Raghavan, C.M. Tan, Statistical modeling of via redundancy effects on interconnect reliability, in 15th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) (2008), pp. 1–5. https://doi.org/10.1109/ipfa.2008.4588156

  66. N. Srivastava, K. Banerjee, A comparative scaling analysis of metallic and carbon nanotube interconnections for nanometer scale VLSI technologies, in Proceedings of the 21st International VLSI Multilevel Interconnect Conference (VMIC) (2004), pp. 393–398

    Google Scholar 

  67. T. Smorodin, U. Beierlein, J.P. Kotthaus, Contacting gold nanoparticles with carbon nanotubes by self-assembly. Nanotechnology 16(8), 1123 (2005). https://doi.org/10.1088/0957-4484/16/8/023

    Article  Google Scholar 

  68. H.-U. Schreiber, Electromigration threshold in aluminum films. Solid-State Electron. 28(6), 617–626 (1985). https://doi.org/10.1016/0038-1101(85)90134-0

    Article  Google Scholar 

  69. A. Seth, Electromigration in integrated circuits. Slides (2009). https://www.scribd.com/document/111108004/Electromigration-in-Integrated-Circuits. Last retrieved on 1 Jan 2018

  70. W. Shao, S.G. Mhaisalkar, T. Sritharan, et al., Direct evidence of Cu/cap/liner edge being the dominant electromigration path in dual damascene Cu interconnects. Appl. Phys. Lett. 90(5), 052106 (2007). https://doi.org/10.1063/1.2437689

    Article  Google Scholar 

  71. D.C. Sekar, A. Naeemi, R. Sarvari, et al., Intsim: a CAD tool for optimization of multilevel interconnect networks, in IEEE/ACM International Conference on Computer-Aided Design (ICCAD) (2007), pp. 560–567. https://doi.org/10.1109/iccad.2007.4397324

  72. C. Subramaniam, A. Sekiguchi, T. Yamada, et al., Nano-scale, planar and multi-tiered current pathways from a carbon nanotube-copper composite with high conductivity, ampacity and stability. Nanoscale 8, 3888 (2016). https://doi.org/10.1039/c5nr03762j

    Article  Google Scholar 

  73. A. Sinitskii, J.M. Tour, Graphene electronics, unzipped. IEEE Spectr. 47(11), 28–33 (2010). https://doi.org/10.1109/MSPEC.2010.5605889

    Article  Google Scholar 

  74. C. Subramaniam, T. Yamana, K. Kobashi, et al., One hundred fold increase in current carrying capacity in a carbon nanotube-copper composite. Nat. Commun. 4(1), 2202 (2013). https://doi.org/10.1038/ncomms3202

  75. J. Tao, J.F. Chen, N.W. Cheung, et al., Modeling and characterization of electromigration failures under bidirectional current stress. IEEE Trans. Electron Devices 43(5), 800–808 (1996). https://doi.org/10.1109/16.491258

    Article  Google Scholar 

  76. J. Tao, N.W. Cheung, C. Hu, Metal electromigration damage healing under bidirectional current stress. IEEE Electron Device Lett. 14(12), 554–556 (1993). https://doi.org/10.1109/55.260787

    Article  Google Scholar 

  77. C.M. Tan, C. Fu, Effectiveness of reservoir length on electromigration lifetime enhancement for ULSI interconnects with advanced technology nodes, in 11th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT) (2012), pp. 1–4. https://doi.org/10.1109/icsict.2012.6467816

  78. C.V. Thompson, Using line-length effects to optimize circuit-level reliability, in 15th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) (2008), pp. 1–4. https://doi.org/10.1109/ipfa.2008.4588155

  79. A. Todri-Sanial, R. Ramos, H. Okuno, et al., A survey of carbon nanotube interconnects for energy efficient integrated circuits. IEEE Circuits Syst. Mag. 2, 47–62 (2017). https://doi.org/10.1109/MCAS.2017.2689538

    Article  Google Scholar 

  80. M. Uekubo, T. Oku, K. Nii, et al., WNx diffusion barriers between Si and Cu. Thin Solid Films 286(1–2), 170–175 (1996). https://doi.org/10.1016/S0040-6090(96)08553-7

    Article  Google Scholar 

  81. S. Van Nguyen, A. Grill, T.J. Haigh, Jr. et al., Self-aligned composite M-MOx/dielectric cap for Cu interconnect structures. U.S. Patent 8299365 (2012)

    Google Scholar 

  82. S. Vaidya, A.K. Sinha, Effect of texture and grain structure on electromigration in Al-0.5%Cu thin films. Thin Solid Films 75(3), 253–259 (1981). https://doi.org/10.1016/0040-6090(81)90404-1

    Article  Google Scholar 

  83. F.L. Wei, C.L. Gan, T.L. Tan, et al., Electromigration-induced extrusion failures in Cu/low-k interconnects. J. Appl. Phys. 104(2), 023529–023529-10 (2008). https://doi.org/10.1063/1.2957057

    Article  Google Scholar 

  84. F.L. Wei, C.S. Hau-Riege, A.P. Marathe, et al., Effects of active atomic sinks and reservoirs on the reliability of Cu/low-k Interconnects. J. Appl. Phys. 103(8), 084513, 2008. https://doi.org/10.1063/1.2907962

    Article  Google Scholar 

  85. B.Q. Wei, R. Vajtai, P.M. Ajayan, Reliability and current carrying capacity of carbon nanotubes. Appl. Phys. Lett. 79, 1172 (2001). https://doi.org/10.1063/1.1396632

    Article  Google Scholar 

  86. W. Wu, J.S. Yuan, Skin effect of on-chip copper interconnects on electromigration. Solid-State Electron. 46(12), 2269–2272 (2002). https://doi.org/10.1016/S0038-1101(02)00232-0

    Article  Google Scholar 

  87. S. Xu, X. Zhu, H. Kotadia, et al., Remedies to control electromigration: effects of CNT doped Sn-Ag-Cu interconnects, in 62nd IEEE Electronic Components and Technology Conference (ECTC) (2012), pp. 1899–1904. https://doi.org/10.1109/ectc.2012.6249097

  88. Z. Yao, C.L. Kane, C. Dekker, High-field electrical transport in single-wall carbon nanotubes. Phys. Rev. Lett. 84, 2941 (2000). https://doi.org/10.1103/PhysRevLett.84.2941

    Article  Google Scholar 

  89. C.-C. Yang, F.R. McFeely, B. Li, et al., Low-temperature reflow anneals of Cu on Ru. IEEE Electron Device Lett. 32(6), 806–808 (2011). https://doi.org/10.1109/LED.2011.2132691

    Article  Google Scholar 

  90. C.S. Yoo, Semiconductor Manufacturing Technology (World Scientific, 2008). ISBN 978-981-256-823-6

    Google Scholar 

  91. M. Yao, X. Zhang, C. Zhao, et al., Self-consistent design issues for high frequency Cu interconnect reliability incorporating skin effect. Microelectron. Reliab. 51(5), 1003–1010 (2011). https://doi.org/10.1016/j.microrel.2010.12.011

    Article  Google Scholar 

  92. P. Zarkesh-Ha, J.A. Davis, J.D. Meindl, Prediction of net-length distribution for global interconnects in a heterogeneous system on-a-chip. IEEE Trans. Very Large Scale Integr. VLSI Syst. 8(6), pp. 649–659 (2000). https://doi.org/10.1109/92.902259

    Article  Google Scholar 

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Lienig, J., Thiele, M. (2018). Mitigating Electromigration in Physical Design. In: Fundamentals of Electromigration-Aware Integrated Circuit Design. Springer, Cham. https://doi.org/10.1007/978-3-319-73558-0_4

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