Abstract
Embedded systems executing specialized programs are playing an increasing role in computing. This trend has increased the demand for processors that can guarantee high-performance under stringent cost, power and code size constraints. Indirect addressing is by far the most used addressing mode in programs running on these systems, since it enables the design of small and faster instructions. This paper proposes a solution to the problem of allocating registers to array references using auto-increment addressing modes. It extends previous work in the area, by enabling efficient allocation in the presence of control-flow statements. An optimizing DSP compiler, from Conexant Systems Inc., was used to validate this idea. Experimental results reveal a substantial improvement in code performance, when comparing to a priority-based register coloring algorithm.
In this paper we use post-increment only. A generalization to include pre-increment is fairly straightforward.
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References
A. Aho, R. Sethi, and J. Ullman. Compilers, Principles, Techniques and Tools. Addison Wesley, Boston, 1988.
Analog Devices. ADSP-2100 Family User’s Manual.
G. Araujo, A. Sudarsanam, and M. S. Instruction set design and optimizations for address computation in DSP processors. In 9th International Symposium on Systems Synthesis, pages 31–37. IEEE, November 1996.
D. H. Bartley. Optimizing stack frame accesses for processors with restricted addressing modes. Software Practice and Experience, 22(2):101, February 1992.
D. Bradlee, E. S.J., and R. Henry. Integrating register allocation and instruction scheduling for RISCs. In Proceedings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, pages 122–131, April 1991.
P. Briggs, K. Cooper, K. Kennedy, and L. Torczon. Coloring heuristics for register allocation. In Proc. of the ACM SIGPLAN’89 on Conference on Programming Language Design and Implementation, pages 98–105, June 1982.
D. Callahan and B. Koblenz. Register allocation via hierarchical graph coloring. In Proc. of the ACM SIGPLAN’91 Conference on Programming Language Design and Implementation, pages 192–202, June 1991.
G. Chaitin. Register allocation and spilling via graph coloring. In Proc. of the ACM SIGPLAN’82 Symposium on Compiler Construction, pages 98–105, June 1982.
F. Chow and J. L. Hennessy. The priority-based coloring approach to register allocation. ACM Trans. Program. Lang. Syst., 12(4):501–536, October 1990.
R. Cytron, J. Ferrante, B. Rosen, M. Wegman, and F. Zadeck. An efficient method of computing static single assignment form. In Proc. of the ACM POPL’89, pages 23–25, 1989.
R. Cytron, J. Ferrante, B. Rosen, M. Wegman, and F. Zadeck. Efficiently computing static single assignment form and the program dependence graph. ACM TOPLAS, 13(4):451–490, October 1991.
E. Eckstein and A. Krall. Minimizing cost of local variables access for DSP-processors. In Proceedings of the ACM SIGPLAN 1999 Workshop on Languages, Compilers, and Tools for Embedded Systems, pages 20–27, May 1999.
C. Gebotys. DSP address optimization using a minimum cost circulation technique. In Proceedings of the International Conference on Computer-Aided Design, pages 100–103. IEEE, November 1997.
J. Goodman and A. Hsu. Code scheduling and register allocation in large basic blocks. In Proceedings of the 1988 Conference on Supercomputing, pages 442–452, July 1988.
R. Gupta, M. Soffa, and D. Ombres. Efficient register allocation via coloring using clique separators. ACM Trans. Programming Language and Systems, 16(3):370–386, May 1994.
Hitchcock III, C.Y. Addressing Modes for Fast and Optimal Code Generation. PhD thesis, Carnegie-Mellon University, Pittsburgh, PA, Dec. 1986.
L. Horwitz, R. Karp, R. Miller, and S. Winograd. Index register allocation. Journal of the ACM, 13(1):43–61, January 1966.
R. Laupers and F. David. A uniform optimization technique for offset assignment problems. In Proceedings of the ACM SIGDA 11th International Symposium on System Synthesis, pages 3–8, December 1998.
R. Leupers, A. Basu, and P. Marwedel. Optimized array index computation in DSP programs. In Proceedings of the ASP-DAC. IEEE, February 1998.
S. Liao, S. Devadas, K. Keutzer, S. Tjiang, and A. Wang. Storage assignment to decrease code size. In Proc. of 1995 ACM Conference on Programming Language Design and Implementation, 1995.
S. S. Muchnick. Advanced Compiler Design and Implementation. Morgan Kaufmann Publishers, 1997.
A. Rao and S. Pande. Storage assignment optimizations to generate compact and efficient code on embedded dsps. In Proceedings of the ACM SIGPLAN 1999 Conference on Programming Language Design and Implementation, pages 128–138, May 1999.
Texas Instruments. TMS320C6x User’s Guide, 1999.
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Cintra, M., Araujo, G. (2001). Array Reference Allocation Using SSA-Form and Live Range Growth. In: Davidson, J., Min, S.L. (eds) Languages, Compilers, and Tools for Embedded Systems. LCTES 2000. Lecture Notes in Computer Science, vol 1985. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45245-1_4
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DOI: https://doi.org/10.1007/3-540-45245-1_4
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