We used silicon molding and examined the protective layer on a silicon molded Peltier array. Both a large p-type array and n-type array were created with the protective layer. Because the conventional bismuth-antimony-telluride (BiSbTe) alloys react with XeF2 etching gas rapidly, we need to place the protective layer at the interface between the silicon and the thermoelectric material using the water vapor thermal oxidization method. As the xenon difluoride selective etching ratio of silicon and SiO2 is about 100:1, the protective layer is damaged if the removal ratio of silicon is high and the etching process time is long. Next we examined a new method involving both an anisotropic process using deep reactive ion etching (DRIE) and an isotropic process using XeF2 etching, and we formulated an etching process that causes no damage to the protective layer.
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Acknowledgements
The authors thank Assistant Professor Shuji Tanaka at Tohoku University for his advice on the␣silicon molding method and Shinji Tanaka at␣the Advanced Materials Laboratories of Sony␣for his work on the TEM analysis and observations.
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Tonosaki, M., Ishida, Y. & Ryoson, H. Effect of Protective Layer and Etch Process on Silicon Molded Micro Peltier Arrays. J. Electron. Mater. 38, 968–973 (2009). https://doi.org/10.1007/s11664-009-0671-0
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DOI: https://doi.org/10.1007/s11664-009-0671-0