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Methodologies for Design Space Exploration

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Abstract

In this chapter, an overview of techniques and methods for the design space exploration (DSE) of embedded systems is presented. DSE is the critical design process in which system designs are modeled, evaluated, and, eventually, optimized for the various extra-functional system behaviors, such as performance, power or energy consumption, and cost. The discussion is organized along the lines of the two primary elements of DSE, namely, the evaluation of single design points and the search strategy for covering the design space.

Keywords

  • Design space exploration
  • Multi-objective optimization
  • Performance modeling
  • Genetic algorithms

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References

  • Balarin F, Sentovich E, Chiodo M, Giusto P, Hsieh H, Tabbara B, Jurecska A, Lavagno L, Passerone C, Suzuki K, Sangiovanni-Vincentelli A (1997) Hardware-software co-design of embedded systems – the POLIS approach. Kluwer Academic Publishers, Norwell

    CrossRef  MATH  Google Scholar 

  • Beasley D, Bull DR, Martin RR (1993) An overview of genetic algorithms: part I-fundamentals. Univ Comput 15(2):58–69

    Google Scholar 

  • Bellard F (2005) Qemu, a fast and portable dynamic translator. In: Proceedings of the USENIX annual technical conference, pp 41–46

    Google Scholar 

  • Binkert N et al (2011) The gem5 simulator. SIGARCH Comput Archit News 39(2):1–7

    CrossRef  Google Scholar 

  • Bringmann O, Ecker W, Gerstlauer A, Goyal A, Mueller-Gritschneder D, Sasidharan P, Singh S (2015) The next generation of virtual prototyping: ultra-fast yet accurate simulation of hw/sw systems. In: Proceedings of the international conference on design, automation & test in Europe (DATE), pp 1698–1707

    Google Scholar 

  • Butko A, Garibotti R, Ost L, Lapotre V, Gamatie A, Sassatelli G, Adeniyi-Jones C (2015) A trace-driven approach for fast and accurate simulation of manycore architectures. In: Proceedings of the Asia and South Pacific design automation conference (ASP-DAC), pp 707–712

    Google Scholar 

  • Cai L, Gajski D (2003) Transaction level modeling: an overview. In: Proceedings of the international conference on hardware/software codesign and system synthesis (CODES+ISSS), pp 19–24

    Google Scholar 

  • Castrillon J, Velasquez R, Stulova A, Sheng W, Ceng J, Leupers R, Ascheid G, Meyr H (2010) Trace-based KPN composability analysis for mapping simultaneous applications to MPSoC platforms. In: Proceedings of the conference on design, automation test in Europe (DATE), pp 753–758

    Google Scholar 

  • Castrillon J, Leupers R, Ascheid G (2013) MAPS: mapping concurrent dataflow applications to heterogeneous MPSoCs. IEEE Trans Ind Inf 9(1):527–545

    CrossRef  Google Scholar 

  • Ceng J, Sheng W, Castrillon J, Stulova A, Leupers R, Ascheid G, Meyr H (2009) A high-level virtual platform for early MPSoC software development. In: Proceedings of the 7th IEEE/ACM international conference on hardware/software codesign and system synthesis (CODES+ISSS)

    Google Scholar 

  • Chen Z, Zhou Y, Huang Z (2019) Auto-creation of effective neural network architecture by evolutionary algorithm and resnet for image classification. In: 2019 IEEE international conference on systems, man and cybernetics (SMC). IEEE, pp 3895–3900

    Google Scholar 

  • Deng J, Dong W, Socher R, Li LJ, Li K, Fei-Fei L (2009) Imagenet: a large-scale hierarchical image database. In: 2009 IEEE conference on computer vision and pattern recognition. IEEE, pp 248–255

    Google Scholar 

  • Eeckhout L (2010) Computer architecture performance evaluation methods. Synthesis lectures on computer architecture. Morgan & Claypool Publishers, San Rafael

    Google Scholar 

  • Erbas C, Cerav-Erbas S, Pimentel AD (2006) Multiobjective optimization and evolutionary algorithms for the application mapping problem in multiprocessor system-on-chip design. IEEE Trans Evolut Comput 10(3):358–374

    CrossRef  Google Scholar 

  • Erbas C, Pimentel AD, Thompson M, Polstra S (2007) A framework for system-level modeling and simulation of embedded systems architectures. EURASIP J Embed Syst 207:1–11

    CrossRef  Google Scholar 

  • Ferrante A, Milosevic J, Janjšević M (2013) A security-enhanced design methodology for embedded systems. In: Proceedings of the international conference on security and cryptography (SECRYPT), pp 1–12

    Google Scholar 

  • Gheorghita SV et al (2009) System-scenario-based design of dynamic embedded systems. ACM Trans Des Autom Electronic Syst 14(1):1–45

    CrossRef  Google Scholar 

  • Glaß M, Lukasiewycz M, Streichert T, Haubelt C, Teich J (2007) Reliability-aware system synthesis. In: Proceedings of the conference on design, automation test in Europe, pp 1–6

    Google Scholar 

  • Glaß M, Lukasiewycz M, Reimann F, Haubelt C, Teich J (2008) Symbolic reliability analysis and optimization of ecu networks. In: Proceedings of the conference on design, automation and test in Europe, pp 158–163

    Google Scholar 

  • Goens A, Khasanov R, Castrillon J, Polstra S, Pimentel AD (2016) Why comparing system-level MPSoC mapping approaches is difficult: a case study. In: Proceedings of the IEEE 10th international symposium on embedded multicore/many-core systems-on-chip (MCSoC)

    Google Scholar 

  • Goens A, Khasanov R, Castrillon J, Hähnel M, Smejkal T, Härtig H (2017) Tetris: a multi-application run-time system for predictable execution of static mappings. In: Proceedings of the 20th international workshop on software and compilers for embedded systems (SCOPES), pp 11–20

    Google Scholar 

  • Goens A, Siccha S, Castrillon J (2017) Symmetry in software synthesis. ACM Trans Archit Code Optim 14(2):1–26

    CrossRef  Google Scholar 

  • Gressl L, Steger C, Neffe U (2019) Security driven design space exploration for embedded systems. In: Forum for specification and design languages (FDL), pp 1–8

    Google Scholar 

  • Gries M (2004) Methods for evaluating and covering the design space during early design development. Integr VLSI J 38(2):131–183

    CrossRef  Google Scholar 

  • Jhumka A, Klaus S, Huss SA (2005) A dependability-driven system-level design approach for embedded systems. In: Proceedings of the conference on design, automation and test in Europe, pp 372–377

    Google Scholar 

  • Jia ZJ, Bautista T, Núñez A, Thompson M, Pimentel AD (2013) A system-level infrastructure for multi-dimensional MP-SoC design space co-exploration. ACM Trans Embed Comput Syst 13:1–26(1s)

    Google Scholar 

  • Jia ZJ, Núñez A, Bautista T, Pimentel AD (2014) A two-phase design space exploration strategy for system-level real-time application mapping onto MPSoC. Microprocessors Microsyst 38(1):9–21

    CrossRef  Google Scholar 

  • Keutzer K, Newton A, Rabaey J, Sangiovanni-Vincentelli A (2000) System-level design: orthogonalization of concerns and platform-based design. IEEE Trans Comput-Aided Des Integr Circuits Syst 19(12):1523–1543

    CrossRef  Google Scholar 

  • Khasanov R, Castrillon J (2020) Energy-efficient runtime resource management for adaptable multi-application mapping. In: Proceedings of the design, automation and test in Europe conference (DATE)

    Google Scholar 

  • Kienhuis B, Deprettere FE, van der Wolf P, Vissers K (2002) A methodology to design programmable embedded systems: the Y-chart approach. Lect Notes Comput Sci Embed Process Des Chall 2268:18–37

    CrossRef  MATH  Google Scholar 

  • Li S et al (2013) The McPAT framework for multicore and manycore architectures: simultaneously modeling power, area, and timing. ACM Trans Archit Code Optim 10(1):5

    CrossRef  Google Scholar 

  • Lin CW, Zheng B, Zhu Q, Sangiovanni-Vincentelli A (2015) Security-aware design methodology and optimization for automotive systems. ACM Trans Des Autom Electron Syst 21(1):1–26

    CrossRef  Google Scholar 

  • Lu Z, Whalen I, Boddeti V, Dhebar Y, Deb K, Goodman E, Banzhaf W (2018) NSGA-Net: a multi-objective genetic algorithm for neural architecture search. arXiv preprint arXiv:1810.03522

    Google Scholar 

  • Lukasiewycz M, Glass M, Haubelt C, Teich J (2008) Efficient symbolic multi-objective design space exploration. In: Proceedings of the Asia and South Pacific design automation conference (ASP-DAC), pp 691–696

    Google Scholar 

  • Madsen J, Stidsen TK, Kjaerulf P, Mahadevan S (2006) Multi-objective design space exploration of embedded system platforms. In: Kleinjohann B, Kleinjohann L, Machado RJ, Pereira CE, Thiagarajan PS (eds) From model-driven design to resource management for distributed embedded systems. Springer, Boston, pp 185–194

    CrossRef  Google Scholar 

  • Mariani G, Brankovic A, Palermo G, Jovic J, Zaccaria V, Silvano C (2010) A correlation-based design space exploration methodology for multi-processor systems-on-chip. In: Proceedings of the design automation conference (DAC), pp 120–125

    Google Scholar 

  • Miikkulainen R, Liang J, Meyerson E, Rawal A, Fink D, Francon O, Raju B, Shahrzad H, Navruzyan A, Duffy N et al (2019) Evolving deep neural networks. In: Artificial intelligence in the age of neural networks and brain computing. Elsevier, Amsterdam, pp 293–312

    CrossRef  Google Scholar 

  • Mohanty S, Prasanna VK, Neema S, Davis J (2002) Rapid design space exploration of heterogeneous embedded systems using symbolic search and multi-granular simulation. In: Proceedings of LCTES+SCOPES, pp 18–27

    Google Scholar 

  • Niemann R, Marwedel P (1997) An algorithm for hardware/software partitioning using mixed integer linear programming. Des Autom Embed Syst 2(2):165–193

    CrossRef  Google Scholar 

  • Nikolov H, Thompson M, Stefanov T, Pimentel AD, Polstra S, Bose R, Zissulescu C, Deprettere E (2008) Daedalus: toward composable multimedia MP-SoC design. In: Proceedings of the 45th annual design automation conference, DAC’08, pp 574–579

    Google Scholar 

  • Padmanabhan S, Chen Y, Chamberlain RD (2011) Optimal design-space exploration of streaming applications. In: Proceedings of the IEEE international conference on application-specific systems, architectures and processors (ASAP), pp 227–230

    Google Scholar 

  • Palesi M, Givargis T (2002) Multi-objective design space exploration using genetic algorithms. In: Proceedings of the international symposium on hardware/software codesign (CODES), pp 67–72

    Google Scholar 

  • Panerati J, Sciuto D, Beltrame G (2017) Optimization strategies in design space exploration. In: Ha S, Teich J (eds) Handbook of hardware/software codesign. Springer, Dordrecht

    Google Scholar 

  • Pimentel AD (2017) Exploring exploration: a tutorial introduction to embedded systems design space exploration. IEEE Des Test 34(1):77–90

    CrossRef  Google Scholar 

  • Pimentel A (2020) A case for security-aware design-space exploration of embedded systems. J Low Power Electron Appl 10(3):1–12

    CrossRef  MathSciNet  Google Scholar 

  • Pimentel AD, van Stralen P (2017) Scenario-based design space exploration. In: Ha S, Teich J (eds) Handbook of hardware/software codesign. Springer, Dordrecht

    Google Scholar 

  • Pimentel AD, Erbas C, Polstra S (2006) A systematic approach to exploring embedded system architectures at multiple abstraction levels. IEEE Trans Comput 55(2):99–112

    CrossRef  Google Scholar 

  • Piscitelli R, Pimentel AD (2012a) Design space pruning through hybrid analysis in system-level design space exploration. In: Proceedings of the international conference on design, automation, and test in Europe (DATE), pp 781–786

    Google Scholar 

  • Piscitelli R, Pimentel AD (2012b) Interleaving methods for hybrid system-level MPSoC design space exploration. In: Proceedings of the international conference on embedded computer systems (SAMOS), pp 7–14

    Google Scholar 

  • Quan W, Pimentel AD (2014) Towards exploring vast MPSoC mapping design spaces using a bias-elitist evolutionary approach. In: Proceedings of the euromicro digital system design conference (DSD), pp 655–658

    Google Scholar 

  • Quan W, Pimentel AD (2015) A hybrid task mapping algorithm for heterogeneous MPSoCs. ACM Trans Embed Comput Syst 14(1):1–25

    CrossRef  Google Scholar 

  • Quan W, Pimentel AD (2016a) A hierarchical run-time adaptive resource allocation framework for large-scale MPSoC systems. Des Autom Embed Syst 20(4):311–339

    CrossRef  Google Scholar 

  • Quan W, Pimentel AD (2016b) Scenario-based run-time adaptive MPSoC systems. J Syst Archit 62:12–23

    CrossRef  Google Scholar 

  • Real E, Moore S, Selle A, Saxena S, Suematsu YL, Tan J, Le QV, Kurakin A (2017) Large-scale evolution of image classifiers. In: Proceedings of the 34th international conference on machine learning vol 70, pp 2902–2911. JMLR.org

    Google Scholar 

  • Real E, Aggarwal A, Huang Y, Le QV (2019) Regularized evolution for image classifier architecture search. In: Proceedings of the AAAI conference on artificial intelligence, vol 33, pp 4780–4789

    Google Scholar 

  • Reiss A, Stricker D (2012) Introducing a new benchmarked dataset for activity monitoring. In: 2012 16th international symposium on wearable computers. IEEE, pp 108–109

    Google Scholar 

  • Sangiovanni-Vincentelli A, Martin G (2001) Platform-based design and software design methodology for embedded systems. IEEE Des Test Comput 18:23–33

    CrossRef  Google Scholar 

  • Sapra D, Pimentel AD (2020a) Constrained evolutionary piecemeal training to design efficient neural networks. In: Proceedings of the 33rd international conference on industrial, engineering & other applications of applied intelligent systems (IEA/AIE 2020)

    Google Scholar 

  • Sapra D, Pimentel AD (2020b) An evolutionary optimization algorithm for gradually saturating objective functions. In: Proceedings of the ACM international genetic and evolutionary computation conference (GECCO 2020)

    Google Scholar 

  • Singh AK, Shafique M, Kumar A, Henkel J (2013) Mapping on multi/many-core systems: survey of current and emerging trends. In: Proceedings of the design automation conference (DAC), pp 1–10

    Google Scholar 

  • Stefanov T, Pimentel AD, Nikolov H (2017) Daedalus: system-level design methodology for streaming multi-processor embedded systems-on-chip. In: Ha S, Teich J (eds) Handbook of hardware/software codesign. Springer, Dordrecht

    Google Scholar 

  • Stierand I, Malipatlolla S, Fröschle S, Stühring A, Henkler S (2014) Integrating the security aspect into design space exploration of embedded systems. In: Proceedings of the IEEE international symposium on software reliability engineering workshops, pp 371–376

    Google Scholar 

  • Tan B, Biglari-Abhari M, Salcic Z (2017) An automated security-aware approach for design of embedded systems on MPSoC. ACM Trans Embed Comput Syst 16(5s):1–20

    CrossRef  Google Scholar 

  • Thompson M (2012) Tools and techniques for efficient system-level design space exploration. Ph.D. thesis, Universiteit van Amsterdam

    Google Scholar 

  • Thompson M, Pimentel AD (2007) Towards multi-application workload modeling in sesame for system-level design space exploration. In: Vassiliadis S, Bereković M, Hämäläinen TD (eds) Embedded computer systems: architectures, modeling, and simulation. Springer, Berlin/Heidelberg, pp 222–232

    CrossRef  Google Scholar 

  • Thompson M, Pimentel AD (2013) Exploiting domain knowledge in system-level MPSoC design space exploration. J Syst Archit 59(7):351–360

    CrossRef  Google Scholar 

  • Thompson M, Pimentel AD, Polstra S, Erbas C (2006) A mixed-level co-simulation method for system-level design space exploration. In: Proceedings of the IEEE/ACM workshop on embedded systems for real-time multimedia (ESTIMedia’06), pp 27–32

    Google Scholar 

  • Thompson M, Nikolov H, Stefanov T, Pimentel AD, Erbas C, Polstra S, Deprettere E (2007) A framework for rapid system-level exploration, synthesis and programming of multimedia MP-SoCs. In: CODES+ISSS’07: proceedings of the 5th IEEE/ACM international conference on hardware/software codesign and system synthesis, pp 9–14

    Google Scholar 

  • Thoziyoor S, Ahn JH, Monchiero M, Brockman JB, Jouppi NP (2008) A comprehensive memory modeling tool and its application to the design and analysis of future memory hierarchies. In: Proceedings of the international symposium on computer architecture (ISCA), pp 51–62

    Google Scholar 

  • Uhlig RA, Mudge TN (1997) Trace-driven memory simulation: a survey. ACM Comput Surv 29(2):128–170

    CrossRef  Google Scholar 

  • van Stralen P, Pimentel AD (2010a) Scenario-based design space exploration of MPSoCs. In: Proceedings of IEEE international conference on computer design (ICCD), pp 305–312

    Google Scholar 

  • van Stralen P, Pimentel AD (2010b) A trace-based scenario database for high-level simulation of multimedia MP-SoCs. In: Proceedings of the international conference on embedded computer systems: architectures, modeling and simulation (SAMOS), pp 11–19

    Google Scholar 

  • van Stralen P, Pimentel AD (2012) A SAFE approach towards early design space exploration of fault-tolerant multimedia MPSoCs. In: Proceedings of international conference on hardware/software codesign and system synthesis (CODES+ISSS), pp 393–402

    Google Scholar 

  • van Stralen P, Pimentel AD (2013) Fitness prediction techniques for scenario-based design space exploration. IEEE Trans Comput-Aided Des Integr Circuits Syst 32(8):1240–1253

    CrossRef  Google Scholar 

  • Weichslgartner A, Wildermann S, Götzfried J, Freiling F, Glaundefined M, Teich J (2016) Design-time/run-time mapping of security-critical applications in heterogeneous MPSoCs. In: Proceedings of the 19th international workshop on software and compilers for embedded systems (SCOPES), pp 153–162

    Google Scholar 

  • Wolf W, Jerraya AA, Martin G (2008) Multiprocessor system-on-chip (MPSoC) technology. IEEE Trans Comput-Aided Des Integr Circuits Syst 27(10):1701–1713

    CrossRef  Google Scholar 

  • Xie L, Yuille A (2017) Genetic CNN. In: Proceedings of the IEEE international conference on computer vision, pp 1379–1388

    Google Scholar 

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Correspondence to Andy D. Pimentel .

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Pimentel, A.D. (2022). Methodologies for Design Space Exploration. In: Chattopadhyay, A. (eds) Handbook of Computer Architecture. Springer, Singapore. https://doi.org/10.1007/978-981-15-6401-7_23-1

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  • DOI: https://doi.org/10.1007/978-981-15-6401-7_23-1

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