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Hardware/Software Codesign Across Many Cadence Technologies

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Handbook of Hardware/Software Codesign

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Abstract

Cadence offers many technologies and methodologies for hardware/software codesign of advanced electronic and software systems. This chapter outlines many of these technologies and provides a brief overview of their key use models and methodologies. These include advanced verification, prototyping – both virtual and real, emulation, high-level synthesis, design of an Application-Specific Instruction-set Processor (ASIP), and software-driven verification approaches.

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Authors and Affiliations

  1. Cadence Design Systems, San Jose, CA, USA

    Grant Martin, Frank Schirrmeister & Yosinori Watanabe

Authors
  1. Grant Martin
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  2. Frank Schirrmeister
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  3. Yosinori Watanabe
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Corresponding author

Correspondence to Grant Martin .

Editor information

Editors and Affiliations

  1. Computer Science and Engineering, Seoul National University, Seoul, Korea (Republic of)

    Soonhoi Ha

  2. Computer Science, Friedrich-Alexander-Universität Computer Science, Nürnberg, Germany

    Jürgen Teich

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Martin, G., Schirrmeister, F., Watanabe, Y. (2016). Hardware/Software Codesign Across Many Cadence Technologies. In: Ha, S., Teich, J. (eds) Handbook of Hardware/Software Codesign. Springer, Dordrecht. https://doi.org/10.1007/978-94-017-7358-4_33-1

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  • DOI: https://doi.org/10.1007/978-94-017-7358-4_33-1

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  • Print ISBN: 978-94-017-7358-4

  • Online ISBN: 978-94-017-7358-4

  • eBook Packages: Springer Reference EngineeringReference Module Computer Science and Engineering

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