Daedalus: System-Level Design Methodology for Streaming Multiprocessor Embedded Systems on Chips

Living reference work entry


The complexity of modern embedded systems, which are increasingly based on heterogeneous multiprocessor system-on-chip (MPSoC) architectures, has led to the emergence of system-level design. To cope with this design complexity, system-level design aims at raising the abstraction level of the design process from the register-transfer level (RTL) to the so-called electronic system level (ESL). However, this opens a large gap between deployed ESL models and RTL implementations of the MPSoC under design, known as the implementation gap. Therefore, in this chapter, we present the Daedalus methodology which the main objective is to bridge this implementation gap for the design of streaming embedded MPSoCs. Daedalus does so by providing an integrated and highly automated environment for application parallelization, system-level design space exploration, and system-level hardware/software synthesis and code generation.


Architecture Model Processing Component Design Space Exploration Platform Model Register Transfer Level 
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Copyright information

© Springer Science+Business Media Dordrecht 2016

Authors and Affiliations

  1. 1.Leiden UniversityLeidenThe Netherlands
  2. 2.University of AmsterdamAmsterdamThe Netherlands

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