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Parallel Simulation

Living reference work entry

Abstract

The SystemC standard is widely used in industry and academia to model and simulate electronic system-level designs. However, despite the availability of multi-core processor hosts, the reference SystemC simulator is still based on sequential Discrete Event Simulation (DES) which executes only a single thread at any time.

In recent years, parallel SystemC simulators have been proposed which run multiple threads in parallel based on Parallel Discrete Event Simulation (PDES) semantics. While this can improve the simulator run time by an order of magnitude, synchronous PDES requires careful dependency analysis of the model and still limits the parallel execution to threads that run at the same simulation time.

In this chapter, we review the classic DES and PDES algorithms and then present a state-of-the-art approach called Out-of-Order Parallel Discrete Event Simulation (OOO PDES) which breaks the traditional time cycle barrier and executes threads in parallel and out of order (ahead of time) while maintaining the standard SystemC modeling semantics. Specifically, we present our Recoding Infrastructure for SystemC (RISC) that consists of a dedicated SystemC compiler and advanced parallel simulator. RISC provides an open-source reference implementation of OOO PDES and achieves fastest simulation speed for traditional SystemC models without any loss of accuracy.

Keywords

Event Notification Time Advance Abstract Syntax Tree Ready Queue Timing Hazard 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Notes

Acknowledgements

This work has been supported in part by substantial funding from Intel Corporation. The authors thank Intel Corporation for the valuable support and fruitful collaboration. The authors also thank the anonymous reviewers for valuable suggestions to improve this chapter.

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Copyright information

© Springer Science+Business Media Dordrecht 2016

Authors and Affiliations

  1. 1.Center for Embedded and Cyber-physical SystemsUniversity of CaliforniaIrvineUSA

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