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Codesign Case Study on Transport-Triggered Architectures

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Abstract

Application-specific processors are used to obtain the efficiency of fixed-function application-specific integrated circuits and flexibility of software implementations on programmable processors. The efficiency is achieved by tailoring the processor architecture according to the requirements of the application while the flexibility is provided by the programmability. In this chapter, we introduce a hardware/software codesign environment for developing application-specific processors, which is using processor templates based on the transport-triggering paradigm, hence the name transport-triggered architecture (TTA). Fast Fourier transform (FFT) is used as an example application to illustrate the customization. Specific features of FFTs are discussed, and we show how those can be exploited in FFT implementations. We have customized a TTA processor for FFT, and its energy efficiency is compared against several other FFT implementations to prove the potential of the concept.

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Abbreviations

ADF:

Architecture Description File

ASIC:

Application-Specific Integrated Circuit

ASP:

Application-Specific Processor

CORDIC:

COordinate Rotational DIgital Computer

DFT:

Discrete Fourier Transfrom

DIF:

Decimation-in-Frequency

DIT:

Decimation-in-Time

DSP:

Digital Signal Processor

FFT:

Fast Fourier Transform

HDB:

Hardware Database

IR:

Intermediate Representation

OSAL:

Operation Set Abstraction Layer

RTL:

Register Transfer Level

TCE:

TTA-based Codesign Environment

TTA:

Transport-Triggered Architecture

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Acknowledgements

The authors thank the Finnish Funding Agency for Innovation in the context of the FiDiPro project StreamPro (decision no. 40142/14).

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Authors and Affiliations

  1. Tampere University of Technology, Korkeakoulunkatu 1, Tampere, Finland

    Jarmo Takala & Pekka Jääskeläinen

  2. Ajat Oy, Tekniikantie 4 B, Espoo, Finland

    Teemu Pitkänen

Authors
  1. Jarmo Takala
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  2. Pekka Jääskeläinen
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  3. Teemu Pitkänen
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Correspondence to Jarmo Takala .

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Editors and Affiliations

  1. Department of Computer Science and Engineering, Seoul National University, Seoul, Korea (Republic of)

    Soonhoi Ha

  2. Department of Computer Science, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Erlangen, Germany

    Jürgen Teich

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Takala, J., Jääskeläinen, P., Pitkänen, T. (2017). Codesign Case Study on Transport-Triggered Architectures. In: Ha, S., Teich, J. (eds) Handbook of Hardware/Software Codesign. Springer, Dordrecht. https://doi.org/10.1007/978-94-017-7267-9_39

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