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Bibliography
Colwell RP, Nix RP, O’Donnell JJ, Papworth DB, Rodman PK (1988) A VLIW architecture for a trace scheduling compiler, ACM SIGARCH Computer Architecture News 15(5), October 1987, pp 180–192. A revised version was published in IEEE Trans Comput 37(8):967–979
Colwell RP, Hall WE, Joshi CS, Papworth DB, Rodman PK (1990) Architecture and implementation of a VLIW supercomputer. In: Proceedings, IEEE/ACM supercomputing 90, October 1990. IEEE Computer Society Press, Los Alamitos, pp 910–919
Ellis JR (1986) Bulldog: a compiler for VLIW architectures. MIT Press, Cambridge, MA. Also Ph.D. Thesis, Yale University, New Haven, Conn., February 1985
Fisher JA (1979) The optimization of horizontal microcode within and beyond basic blocks: An application of processor scheduling with resources. Ph.D. Thesis, New York University, New York
Fisher JA (1981) Trace scheduling: a technique for global microcode compaction. IEEE Trans Comput C-30(7):478–490
Fisher JA (1983) Very long instruction work architectures and the ELI-512. In: Proceedings of the 10th annual international symposium on computer architecture, Stockholm, Sweden. ACM, New York, pp 140–150
Fisher JA, Ellis JR, Ruttenberg JC, Nicolau A (1984) Parallel processing: a smart compiler and a dumb machine. In: Proceedings of ACM SIGPLAN ’84 symposium compiler construction, Montreal, June 1984. ACM, New York, pp 37–47
Fisher JA, Faraboschi P, Young C (2004) Embedded computing a VLIW approach to architecture, compilers, and tools. Morang Kaufman, San Francisco
Freudenberger S, Ruttenberg J (1992) J phase ordering of register allocation and instruction scheduling. In: Giergerich R, Graham SL (eds) Code generation – concepts, tools, techniques. Springer, London, pp 146–172
Freudenberger SM, Gross TR, Lowney PG (1994) Avoidance and suppression of compensation code in a trace scheduling compiler. Trans Prog Lang Syst 16(4):1156–1214
Lowney PG, Freudenberger S, Karzes T, Lichtenstein W, Nix R, O’Donnell J, Ruttenberg J (1993) The multiflow trace scheduling compiler. J Supercomput 7(1–2):51–142
Nicolau A, Fisher J (1981) Using an oracle to measure parallelism in single instruction stream programs. The 14th annual microprogramming workshop, October 1981. IEEE, New York, pp 171–182
Nicolau A (1984) Parallelism, memory anti-aliasing and correctness for trace scheduling compilers. Ph.D. Thesis, Yale University, New Haven, CT
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Lowney, G. (2011). Multiflow Computer. In: Padua, D. (eds) Encyclopedia of Parallel Computing. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-09766-4_8
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