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Tera MTA

  • Reference work entry
Encyclopedia of Parallel Computing

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Synonyms

Cray MTA; Cray XMT; Horizon

Definition

The MTA (for Multi-Threaded Architecture) is a highly multithreaded scalar shared-memory multiprocessor architecture developed by Tera Computer Company (renamed Cray Inc. in 2000) in Seattle, Washington. Work began in 1985 at The Institute for Defense Analyses Center for Computing Sciences on a closely related predecessor (Horizon), and development of both hardware and software was continuing at Cray Inc. as of 2010.

Discussion

Introduction

The Tera MTA [1] is in many respects a direct descendant of the Denelcor HEP computer [2]. Like the HEP, the MTA is a scalar shared-memory system equipped with full/empty bits at every 64-bit memory location and multiple protection domains to permit multiprogramming within a processor. However, the MTA introduced a few innovations including VLIW instructions without any register set partitioning, additional ILP via dependence data encoded in each instruction, two-phase blocking synchronization,...

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Bibliography

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Author information

Authors and Affiliations

  1. Microsoft Corporation, Redmond, WA, USA

    Burton Smith

Authors
  1. Burton Smith
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Editor information

Editors and Affiliations

  1. University of Illinois at Urbana-Champaign, Urbana, IL, USA

    David Padua

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© 2011 Springer Science+Business Media, LLC

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Smith, B. (2011). Tera MTA. In: Padua, D. (eds) Encyclopedia of Parallel Computing. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-09766-4_221

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