Encyclopedia of Nanotechnology

Living Edition
| Editors: Bharat Bhushan

Implementing Alternating Nanolaminates in Trenched Energy Storage Systems

Living reference work entry
DOI: https://doi.org/10.1007/978-94-007-6178-0_100911-1


Aluminum Anodic Oxide Atomic Layer Deposition Energy Storage System Aluminum Anodic Oxide Template Atomic Layer Deposition Processing 
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The National Academy of Engineering, in its Grand Challenge on “making solar energy economical,” places emphasis on this statement, “However advanced solar cells become at generating electricity cheaply and efficiently, a major barrier to widespread use of the sun’s energy remains: the need for storage” [1].

For energy storage devices, such as the battery and the supercapacitor, the most common problems are shelf/cycle life, lower efficiency, and high leakage current [2, 3]. These are tremendous challenges for an integrated circuit (IC) industry seeking greater IC functionality, smaller component size, and low power consumption using standard supercapacitors, ultracapacitors, or electrochemical capacitors for on-chip energy storage. In addition, the continuous need to reduce the component size of IC elements has not only begun to challenge the capabilities of traditional photolithography, but has prompted intense research to incorporate nanometer scale structures into current semiconductor technologies.

Nanostructures have unique and attractive characteristics, consisting of spatial arrangement, high surface area and density, and versatile shapes. Nanostructures have several forms: nanowires, nanochannels, nanotubes, nanobeams, nanopores, nanofilms, nanofibers, and nanolaminates. The atomic sizes for these structures vary from 0.1 to 100 nm or 5 to 1,000 atoms. In the past 10 years, nanostructures, particularly nanolaminates, have received significant attention for employability in supercapacitors/energy storage systems. Limitations of these energy storage systems have been plagued by nonconforming layers, pin holes, high leakage currents, low dielectric constants, and cost; all of which are directly related to the selection and quality processing of the materials and the nanostructure architecture. In an effort to address these limitations, researchers have employed alternating nanolaminate layers of high-k dielectric and wide bandgap materials (e.g., hafnium oxide (HfO2), aluminum oxide (Al2O3), titanium oxide (TiO2)) in energy storage systems to achieve higher capacitance density, higher breakdown voltage, and lower leakage current. The high payoff for energy storage is improved equivalent planar capacitance (EPC) performance for existing supercapacitors/energy storage systems.

Equivalent planar capacitance (EPC) is the normalized planar footprint area of a capacitor (capacitance per planar area) and allows comparison between different capacitor structures. Capacitor structures being planar, embedded, or even trenched.


A nanolaminate, or nanolayered coating, consists of two or more alternating layers of dielectric films consisting of ultrathin oxide multilayers having individual layer thickness ranging from 0.1 to 100 nm. Nanolaminates have also been referred to as nanocomposites of materials with distinct properties, e.g., brittle/soft or high-k/wide bandgap materials. Particularly, nanolaminates of high-k dielectric materials have been investigated for energy storage applications [4]. Dielectric materials exhibiting high dielectric constants have recently gained considerable attention for their potential applications in microelectronics, such as capacitors and memory devices [5, 6, 7, 8].

Currently studied high-k materials involve oxides of both transition or lanthanide metals and their alloys, including representative transition metal oxides such as TiO2, Al2O3 [9, 10], and HfO2 and rare-earth oxides, such as La2O3 and Y2O3. For applications of solid state supercapacitors in microchip-embedded devices, the higher the dielectric constant, the larger the energy can be stored. Excellent candidates as high dielectric materials include single oxides (e.g., HfO2, ZrO2, Ta2O5, TiO2), binary oxides (e.g., TixAl1−xOy, HfxAl1−xOy), and perovskite oxides (e.g., BaTiO3, SrTiO3).

By combining and complementing the desirable properties from several materials, ALD-enabled nanolaminates of alternating high dielectric constant (k) and wide bandgap (Eg) materials, theoretically, can achieve low leakage, higher breakdown, and a very high dielectric constant based on the Maxwell–Wagner (M-W) interfacial dielectric effect [10, 11]. When we adapt the analogy of the M-W approach, we can apply electron injection and charge accumulation, as in a depletion region, in a nanolaminate stack of wide bandgap (Al2O3) and high-k (TiO2) material. A negative bias is applied to a Si substrate, and there is enhanced electron tunneling through the Al2O3/TiO2 nanolaminate dielectric stack as indicated by the solid red line in Fig. 1. The electrons reach the interface at a lower Ef and cause higher leakage and low breakdown. When we apply the negative bias to the TiN, there is less direct electron tunneling, because the barrier height of the Al2O3 at 8.8 eV is 5.3 eV higher than the TiO2 (3.5 eV); therefore, it is probable the leakage will be lower and the breakdown higher.
Fig. 1

Energy band diagram of nanolaminate stack of Al2O3/TiO2 with the Maxwell–Wagner effect (Reproduced with permission from AIP Publishing LLC [10])

In 2007, Shi at al. proposed a configuration in which Al2O3 and TiO2 have been investigated as high-k materials to replace SiO2 as a gate oxide and a high-capacitance oxide-based capacitor for electronics [9]. High dielectric constants, in the range of 100–1,000, were achieved with planar Al2O3/TiO2 nanolaminate layers [10, 11], as those featured in Fig. 2. Argonne National Labs investigated these Al2O3/TiO2 nanolaminates, and results for dielectric constant measurements approached a k of 1,000 [12]. In an effort to reduce leakage and expand the range of operation, an interfacial Al2O3 layer was deposited prior to the top electrode. The Al2O3/TiO2 nanolaminates on Si were compromised by charge injection. It should be noted that interfacial behavior dominates the ability of the multiple material lamina to reach peak performance.
Fig. 2

Cross-sectional TEM of alternating Al2O3 and TiO2 nanolaminates

Nanolaminate interfaces can be between materials of distinct properties, and in designing the laminates, the selection of materials should consider these properties, such as modulus, permittivity, conductivity, bandgap, and dielectric constant. Particularly, interfaces with structural defects, e.g., voids, cracks, and delamination, can lead to very leaky/lossy devices. Even though these defects may not propagate throughout the nanolaminate stack, but be localized, there could still be impacts on device performance.

In addition to alternating nanolaminates in a planar configuration, an alternative way to achieve high-capacitance capacitors is to increase the effective surface area by fabricating 3D structures, such as porous structures with high aspect ratios, or trenches. The formation of high-aspect-ratio nanostructures can be attained through the use of non-lithographically self-organized nanotemplates, such as porous anodic aluminum oxides (AAO) [13]. Nanostructured electrodes for electrochemical double layer capacitors were fairly effective in enhancing capacitance, which was attributed to an increase in the surface areas [14].

Energy storage technologies span from conventional capacitors to batteries, inclusive of a region of supercapacitors. Supercapacitor technology has emerged with the potential to enable major advances in energy storage by utilizing higher-surface-area electrode materials and thinner dielectrics to achieve capacitances several orders of magnitude larger than conventional capacitors [2].

In principle, supercapacitors have higher power density than batteries and a charging time that is ten times shorter than a battery [1, 2]. However, supercapacitors are not as efficient as batteries in energy storage, as they tend to draw high leakage current. Despite this drawback, supercapacitors can be fabricated to make their energy densities more comparable to batteries; high energy density can be achieved when the ratio of the effective surface area to the electrode volume is high.

A combination of two processing techniques can be used to enhance surface-to-volume ratios, atomic layer deposition (ALD) and anodic aluminum oxide (AAO). Arrays of nanocapacitors using ultrathin oxide layers or nanolaminates can create a high-power-density energy storage device. It is worth noting that this combination of self-assembly, ordering, uniformity, and conformality on a nanoscale level is extremely advantageous for future ICs.

Key Processes

Atomic Layer Deposition (ALD). ALD is the technique of choice for depositing highly conformal thin films and enabling nanoscale device fabrication. The benefits of ALD are its unique ability for depositing ultrathin films on complex-shaped substrates with a thickness control at the atomic level and high conformality [15, 16]. Other processes used for nanolaminate formation include physical vapor deposition (PVD), dip coating, doctor blading, spray deposition, Langmuir–Blodgett, or chemical vapor deposition (CVD) methods. PVD methods, inclusive of evaporation and sputtering, have limited ability to coat structures with high aspect ratios and poor step coverage. CVD methods have problems with gas-phase reactions and impurities that interfere with nucleation or form defect voids during material growth. The ALD deposition technique is based on surface self-limiting reaction and deposition occurrences through alternating exposure of precursors and reactants, which provides precise control of the deposition thickness, even in ultrathin films and high-aspect-ratio holes and trenches [15, 16, 17]. As trench aspect ratio development continues to increase from 1:25 to greater than 1:200, ALD remains the most effective technique for deposition into the trenches.

ALD has basic characteristics of self-assembly, in which the surface reactions drive atoms and molecules to arrange themselves into functional structures. The ALD film growth process takes place in cycles, one cycle consisting of the following five steps, which are repeated until the desired thickness is obtained: (a) a self-terminating reaction of the first reactant A (precursor exposure), (b) an evacuation or purge to remove the non-reacted reactants and reaction products, (c) a self-terminating reaction of the second reactant/precursor B, (d) an evacuation or purge, and (e) after the reaction being terminated and all the by-products removed, a formation of monolayer of material C (Fig. 3). It is obvious that the self-termination feature enables extraordinary control over film thickness and also quality (pin holes, defects, and clustering are strongly reduced due to the selective interaction at the A/B interface). Another central advantage is the ability to coat 3D features with a conformal layer [17, 18].
Fig. 3

Atomic layer deposition process illustrating the surface nucleation of thin film A and thin film B conforming to patterned layer

ALD has emerged in the semiconductor industry as the technique to deposit very thin, highly insulating (high-k) oxides to serve as dielectrics in trench capacitor structures. ALD has been successfully applied to the depositing of oxide materials, including insulators and other ultrathin metal-oxide films for device applications. Currently the most investigated materials are HfO2, ZnO, TiO2, and/or Al2O3, because of their electrical and mechanical properties. Furthermore, for nanolaminates, the material property of interest is the dielectric constant, k, and the bandgap, as seen in Table 1.
Table 1

List of ALD material parameters of high-k dielectrics


Dielectric constant



Growth rate (nm/cycle)




















ALD has been used to process layer deposition of alternating high-k dielectrics (needed for high capacitor density) and wide bandgap material (needed for low capacitor leakage) stacks of TiO2 and Al2O3 of 3 nm layer thickness. Leakage and charge storage are not only dependent upon the material composition but is directly impacted by the nanolaminate stack thickness as well. TEM of a TiO2 and Al2O3 stack indicates good uniformity, no pin holes, or interface spacing, as in Fig. 4.
Fig. 4

ALD stacks of Al2O3 (white) and TiO2 (dark) of 3 nm thickness

Aluminum Anodic Oxide (AAO) Processing. Anodization is an electrolytic oxidation process in which the metal surface is converted primary to an adherent oxide coating having a desirable thickness and structure. Aluminum anodic oxide (AAO) templates, formed on aluminum by anodizing in acid electrolytes, are prepared following a chemical process. The AAO nanotemplates typically consist of densely packed high-aspect-ratio pores aligned almost perfectly to each other as in Fig. 5. The first published work in the field was Masuda et al. [13]. These papers describe the procedure to fabricate AAO pores on Al foil with ordered hexagonally parallel nanotubes using a two-step anodization technique.
Fig. 5

Schematic layout of ideal AAO porous structure

Parameters governing the successful preparation of an ideal ordered porous structure are:
  1. 1.

    Anodization voltage and current, which determines pore diameter, cell dimension, and pore distribution. The voltage applied in the electrodes is constant during the whole process.

  2. 2.

    Electrochemical bath temperature.

  3. 3.

    Type and concentration of electrolyte.

A two-step anodization method is used to create AAO templates:
  1. 1.

    In the first step of the process, a thick porous alumina layer gradually grows over a very thin dense barrier oxide layer, which acts as an interface between the pure Al surface and porous alumina oxide layer. In the next step the pore array is created, which means that pore diameter is a function of the first anodization. Also, AAO pore diameter increases linearly with the anodization time (characterization must be made in order to find the limiting time in which the ordered array starts to dissolve).

  2. 2.

    The porous oxide layer that is formed is removed and leaves behind an ordered concave textured structure on the surface. The second step begins the Al anodized process again under the same conditions. This acts on the concave sites and forms a deep uniform pore growth, which means that pore height is a function of the second anodization.

The AAO template allows controllability of inner pore distance, pore diameter, and pore depth by changing the anodization conditions. A large-area AAO template can be generated using pure aluminum (99.99 wt% pure metal) foil of 0.1 mm thickness. Aluminum foil can be ultrasonically cleaned in ethanol and methanol and dried at 100 °C. Using a solution of phosphoric acid H3PO4 (85 wt%), sulfuric acid H2SO4 (98 wt%), and water H2O (2:2:1 by volume), the foil needs to be electrochemically polished at a constant voltage of 10 V for 14 min at room temperature to remove micro-roughness from the surface, which can affect the final quality of the films. A solution of 0.3 M oxalic acid (C2H2O4) can be used to perform an initial anodization at a voltage of 40 V for 90 s. After anodization the aluminum template may exhibit a surface roughness due to the internal stress of the different atoms during the anodization process, which may lead to a defective formation of the structures in the porous alumina template. The as-prepared AAO template is placed in an aqueous mixture of phosphoric acid (6 wt%) and chromic acid (0.2 M) to remove anodic oxide formed in the initial anodization. Table 2 gives processing details to be used to form an AAO template. Finally, the sample can be further anodized under the same conditions as the initial anodization for 1 h to create deeper pores of high aspect ratio as in Figs. 6 and 7.
Table 2

Processing parameters for AAO template

Process parameters


Voltage – determines pore diameter, distribution

35 ~ 45 V

1st anodization time – contributes to pore size and cell dimension

90–120 s

2nd anodization time – contributes to pore size and cell dimension

1 h





Electrolyte mixture


Phosphoric acid – contributes to the removal of anodic oxide

6–8 wt%

Chromic acid – contributes to the removal of anodic oxide

0.2 M

Oxalic acid – contributes in the initial formation of pores

0.3 M

Fig. 6

SEM image of aluminum foil after two-step anodization process (pore size ~50 nm)

Fig. 7

Cross-sectional SEM image of aluminum foil after two-step anodization process (pore height ~2 μm)

Since aluminum foil is a very flimsy substrate material, it is very difficult to go through the photolithography process without bending/damaging the AAO template. In order to fabricate devices on the AAO templates, an anodic bonding technique should be used to attach the aluminum structure to a borosilicate glass [19] as in Fig. 8.
Fig. 8

Schematic of anodic bonding setup

High-purity, mechanically polished aluminum foils (99.99 % metal basis) and borosilicate glass are recommended. Aluminum pieces can be mechanically polished using alumina particles of 1 μm diameter. The pieces are then ultrasonically cleaned with methanol and dried at 100 °C. To secure bonding, the Al/glass are set between two plates of stainless steel (electrodes) and heated to 380 °C. After reaching the desired temperature, a dc voltage of 950 V was applied for 20 min. Subsequently, the setup is cooled down to room temperature to avoid cracking of the glass.

Photolithography Processing (PR). A five-level mask can also be used to fabricate nanocapacitors using alternating nanolaminates. Test structures on the mask set are necessary to characterize and analyze the nanocapacitors of planar and trench configuration per Fig. 9.
Fig. 9

(a) Top-down view of nanocapacitor layout with test structures. (b) Layout of bottom electrode (red), top electrode (green), and trench design (yellow)

A top-down view of planar nanolaminate capacitors can be seen in Fig. 10.
Fig. 10

Top-down view of patterned nanolaminate stack

A deep reactive-ion etching (DRIE) system can provide advantages when used for the processing of high-aspect-ratio trenches. The DRIE has the ability to efficiently etch vertical structures in Si wafers with high aspect ratios. DRIE technology is based on the Bosch process, which uses high-density plasma to alternatively etch silicon. Some of the DRIE process advantages include high resolution and cleanliness, process control, use of small amounts of chemicals, and the avoidance of handling acids and solvents. However, in some structures, there can be a residual etch-resistant polymer that remains on the sidewalls, which could impact the trench width uniformity throughout the depth of the trench. SEM or TEM of a cleaved etched wafer can provide measurements to determine aspect ratios. Figure 11 shows high AR trenches fabricated in Si ranging in width from 5 microns to 11 microns and in height from 65 microns to 90 microns.
Fig. 11

Trench etch using DRIE of 2,400 W RF power

Future Directions

Nanolaminate development for nanocapacitor structures requires the integration of multiple disciplines, from materials to physics to chemistry to engineering. Since nanolaminates capitalize on superior properties of each lamina, these structures have the potential to serve as the basis for the next-generation energy storage devices that make use of densely packed interfaces (multilayer/nanolaminates) and have the capability of delivering power to renewable energy sources. These nanostructures are becoming increasingly important for ICs due to properties such as high surface area and downscaling of the technology (achieving densely packed structures from thin films).

When fabricated within a high-aspect-ratio template (AAO or PR processing) using ALD nanolaminates, nanocapacitors filled with alternating high-k and wide bandgap materials will have the ability to simultaneously achieve high capacitance density, high breakdown voltage, and lower leakage current, as compared to a planar capacitor or single layer filled trench capacitor.

ALD processing of trench-refilled capacitors have shown an incremental increase in the capacitance per unit area of 10 μF cm−2 and 100 μF cm−2 [4]. This significantly exceeds previously reported values for capacitors in porous templates [14].

Nanocapacitors with ALD nanolaminates enhance surface-to-volume ratios, improve energy storage properties, and maintain high power density. As systematic research and development continues, the fabrication of nanolaminates opens a new way to fabricate high dielectric constant materials for energy storage applications.

Creation and implementation of nanolaminate nanocapacitor structures has the potential to transform the life span and cost efficiency of energy storage devices for global solutions by 10 times. ALD and AAO technologies can address the current challenge of material reliability/durability, lower processing cost, and novel utilization of alternating nanolaminates in a trench structure. The high payoff for energy storage will improve current equivalent planar capacitance (EPC) performance of existing supercapacitors by one order of magnitude from 100 μF cm−2 up to ~1,000 μF cm−2 using a high-aspect-ratio nanolaminate trench design. EPC can be estimated knowing the dimensions of a porous AAO structure and the thicknesses of the bottom electrode and nanolaminate (insulator) layers.

It has been studied that supercapacitors that use very large surface area electrodes have increased capacitances. The capacitance and energy density of a supercapacitor scales linearly with electrode surface area. Most of the work has been concentrated on the use of carbon-based materials in electrochemical supercapacitors. Carbon-based materials, like graphene, which is conductive, noncorrosive, thermally stable, inexpensive, and potentially high in surface, have been used as electrodes. Gomez et al. used a graphene nanocomposite to achieve a capacitance of 300–500 F/g. Other forms are carbon aerogels, carbon nanotubes, and carbon black particles. Therefore, a carbon-based material that has large surface area, such as graphene, may increase capacity. Two issues that must be addressed include high-temperature processing of the carbon-based materials and conformality.

In an effort to implement enhanced electrodes that will conform to a nanocapacitor nanolaminate structure, ALD processing of metal electrodes can be performed. Several materials can be considered as potential choices to be used in fabricating the electrodes, such as platinum (Pt), nickel (Ni), aluminum nitride (AlN), ruthenium (Ru), titanium nitride (TiN), carbon nanotubes (CNTs), or nanoparticles.

Through the utilization of a trenched structure, nanolaminates, and enhanced metal electrodes, a trench metal-insulator-metal nanocapacitor structure can be achieved. Modeling the effect of area on the capacitance using geometrical parameters of the structure leads to the normalization of capacitance per planar area using the following EPC equation \( EPC=D\ast \frac{2\pi \kappa {\varepsilon}_0L}{In\left(\frac{b}{a}\right)}+\frac{\kappa {\varepsilon}_0}{t_i} \) where D is the pore density, k is the dielectric constant of the insulator, ɛ0 is the permittivity of free space, L is the pore depth, and ti is the thickness of the insulator. Constants, a and b, are dependent upon the thickness of the ALD layers and the radius of the pores [4].

Therefore, based on the EPC formula given for a capacitor formed using AAO pores, a calculated theoretical EPC value for a trenched configuration filled with alternating nanolaminates and having advanced electrodes (Fig. 12) can potentially yield a capacitor density up to ~1,000 μF cm−2 as presented in Fig. 13.
Fig. 12

Nanolaminate filled trench capacitor (T-MIM) structure using anodic aluminum oxide template and enhanced electrodes

Fig. 13

Theoretical EPC values plotted as a function of dielectric constant (25–1,000) for trench capacitor of alternating nanolaminates

Challenges that persistent in the technology are the need for material modeling of inter- and intrafacial behavior at the molecular level, profiling of nanolaminate stack performance, and implementing inexpensive, scalable manufacturing of these versatile structures. When these challenges are met, technological advancements using nanolaminates will progress toward a new generation of nanocapacitors for 3D electronic device energy storage and implantable biomedical system-on-a-chip energy storage.



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Copyright information

© Springer Science+Business Media Dordrecht 2015

Authors and Affiliations

  • Sylvia W. Thomas
    • 1
  • Jing Wang
    • 1
  • Paula A. Algarin
    • 1
  1. 1.Department of Electrical EngineeringUniversity of South FloridaTampaUSA