1. The methodology of testability prediction for sequential circuits

   • Xu Shiyi
   • G. P. Dias

   Regular Papers Pages: 529 - 541

2. A neural network approach to fault diagnosis in analog circuits

   • Wei Naihong
   • Yang Shiyuan
   • Tong Shibai

   Regular Papers Pages: 542 - 550

3. Accelerated techniques in stem fault simulation

   • Shi Yin
   • Wei Daozheng

   Regular Papers Pages: 551 - 561

4. The RTL binding and mapping approach of VHDL High-level synthesis system HLS/BIT

   • Yan Zongfu
   • Liu Mingye

   Regular Papers Pages: 562 - 569

5. Neural networks for omni-view road image understanding

   • Zhu Zhigang
   • Xu Guangyou

   Regular Papers Pages: 570 - 580

6. Speed up training of the recurrent neural network based on constrained optimization techniques

   • Chen Ke
   • Bao Weiquan
   • Chi Huisheng

   Regular Papers Pages: 581 - 588

7. DYNAMEM — A microarchitecture for improving memory disambiguation at run-time

   • Wang Xianzhu
   • Liao Heng
   • Li Sanli

   Regular Papers Pages: 589 - 600

8. Research on protocol migration

   • Wang Yun
   • Gu Guanqun
   • Dui Jiyin

   Regular Papers Pages: 601 - 606

9. Compact DC-DC converter for pocket micro-controller systems

   • Liu Jian
   • Chen Zhiming
   • Du Zhong

   Regular Papers Pages: 607 - 614

10. The global properties of valid formulas in modal logic K

    • Sun Jigui
    • Cheng Xiaochun
    • Liu Xuhua

    Regular Papers Pages: 615 - 621