Vlsi programmable digital filter for video signal processing Giulio CasagrandeArmando ChiariSalvatore Miceli OriginalPaper 01 December 1993 Pages: 219 - 231
A method for calculation of the square root using combinatorial logic David M. Mandelbaum OriginalPaper 01 December 1993 Pages: 233 - 242
An expandable column fft architecture using circuit switching networks Tom ChenLi Zhu OriginalPaper 01 December 1993 Pages: 243 - 257
A superfast algorithm for single-error correction in rrns and hardware implementation J. -D. SunH. KrishnaK. -Y. Lin OriginalPaper 01 December 1993 Pages: 259 - 269
Scheduling synchronous dataflow graphs for efficient looping Shuvra S. BhattacharyyaEdward A. Lee OriginalPaper 01 December 1993 Pages: 271 - 288
Synthesis of synchronous communication hardware in a multiprocessor architecture J. A. HuiskenA. DelaruelleJ. VAN Meerbergen OriginalPaper 01 December 1993 Pages: 289 - 299
Erratum to: High level synthesis and generation FPGAs with the BEDROC system M. Leeser Erratum 01 December 1993 Pages: i - i