Statistical Performance Analysis and Estimation for Parallel Multimedia Processing Min LiTanja Van AchterenFrancky Catthoor OriginalPaper 13 January 2009 Pages: 105 - 116
Bioinspired Parallel Algorithms for Maximum Clique Problem on FPGA Architectures Israel Martínez-PérezWolfgang BrandtKarl-Heinz Zimmermann OriginalPaper 10 December 2008 Pages: 117 - 124
Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive Filtering Yongtao WangHamid MahmoodiKaushik Roy OriginalPaper 13 December 2008 Pages: 125 - 137
A 270ps 20mW 108-bit End-around Carry Adder for Multiply-Add Fused Floating Point Unit Xiao Yan ZhangYiu-Hing ChanMichael Kelly OriginalPaper 10 January 2009 Pages: 139 - 144
Total Power Optimization for Combinational Logic Using Genetic Algorithms Wei-lun HungYuan XieMary Jane Irwin OriginalPaper 19 February 2009 Pages: 145 - 160
Transposed-Memory Free Implementation for Cost-Effective 2D-DCT Processor Shih-Chang HsiaChin-Feng TsaiKing-Chu Hung OriginalPaper 14 March 2009 Pages: 161 - 172
A New Sequential Block Partial Update Normalized Least Mean M-Estimate Algorithm and its Convergence Performance Analysis Shing Chow ChanYi ZhouKa Leung Ho OriginalPaper 28 April 2009 Pages: 173 - 191
A Systematic Design Space Exploration of MPSoC Based on Synchronous Data Flow Specification Choonseung LeeSungchan KimSoonhoi Ha OriginalPaper 10 March 2009 Pages: 193 - 213
A Multi-Shared Register File Structure for VLIW Processors Guillermo Payá-VayáJavier Martín-LangerwerfPeter Pirsch OriginalPaper 20 March 2009 Pages: 215 - 231
Concurrent Error Detection in Multiplexer-Based Multipliers for Normal Basis of GF(2 m ) Using Double Parity Prediction Scheme Chiou-Yng LeeChe Wun ChiouJim-Min Lin OriginalPaper 21 April 2009 Pages: 233 - 246
Variable Partitioning and Scheduling for MPSoC with Virtually Shared Scratch Pad Memory Lei ZhangMeikang QiuEdwin H.-M. Sha OriginalPaper 24 April 2009 Pages: 247 - 265