Interleaved Trellis Coded Modulation and Decoder Optimizations for 10 Gigabit Ethernet over Copper Yongru GuKeshab K. Parhi OriginalPaper 13 February 2006 Pages: 211 - 221
VHDL Implementation of the Fast Wavelet Transform Paul SalamaMaher E. RizkallaMichael Eckbauer OriginalPaper 13 February 2006 Pages: 223 - 239
Hybrid Morphology Processing Unit Architecture for Moving Object Segmentation Systems Shao-Yi ChienBing-Yu HsiehLiang-Gee Chen OriginalPaper 13 February 2006 Pages: 241 - 255
Reciprocal and Reciprocal Square Root Units with Operand Modification and Multiplication Kent E. WiresMichael J. Schulte OriginalPaper 13 February 2006 Pages: 257 - 272
A Novel FPGA Architecture of a 2-D Wavelet Transform Ricardo José Colom PaleroRafael Gadea GironésAngel Sebastia Cortes OriginalPaper 13 February 2006 Pages: 273 - 284
Efficient Reconfigurable Implementation of Canonical and Normal Basis Multipliers Over Galois Fields GF(2 m ) Generated by AOPs J.L. ImañaJ.M. Sánchez OriginalPaper 13 February 2006 Pages: 285 - 296
Survey on Block Matching Motion Estimation Algorithms and Architectures with New Results Yu-Wen HuangChing-Yeh ChenLiang-Gee Chen OriginalPaper 13 February 2006 Pages: 297 - 320
A Survey on Lifting-based Discrete Wavelet Transform Architectures Tinku AcharyaChaitali Chakrabarti OriginalPaper 13 February 2006 Pages: 321 - 339