Quasi-Linear allocation functions for efficient array design Xiaoxiong ZhongSanjay Rajopadhye OriginalPaper 01 May 1992 Pages: 97 - 110
Parallel implementation of neural networks K. Wojtek PrzytulaViktor K. PrasannaWei-Ming Lin OriginalPaper 01 May 1992 Pages: 111 - 123
MSSM—A design aid for multi-stage systolic mapping Yin-Tsung HwangYu Hen Hu OriginalPaper 01 May 1992 Pages: 125 - 145
VLSI parallel architecture for Kalman filterAn algorithm specific approach Magdy A. BayoumiPadma RaoBassem Alhalabi OriginalPaper 01 May 1992 Pages: 147 - 163
A radix-8 wafer scale FFT processor Earl E. Swartzlander Jr.Vijay K. JainHiroomi Hikawa OriginalPaper 01 May 1992 Pages: 165 - 176
High-speed VLSI arithmetic processor architectures using hybrid number representation H. R. SrinivasKeshab K. Parhi OriginalPaper 01 May 1992 Pages: 177 - 198
Power dissipation of VLSI array processing systems Paul M. ChauScott R. Powell OriginalPaper 01 May 1992 Pages: 199 - 212
Systolic inner product arrays with automatic word rounding M. YanJ. V. Mc Canny Regular Papers 01 May 1992 Pages: 227 - 242
Initializing RAM-based logarithmic processors M. G. ArnoldT. A. BaileyJ. J. Cupal Regular Papers 01 May 1992 Pages: 243 - 252