1. Introduction

   • Kung Yao

   EditorialNotes 01 May 1992 Pages: 95 - 96

2. Quasi-Linear allocation functions for efficient array design

   • Xiaoxiong Zhong
   • Sanjay Rajopadhye

   OriginalPaper 01 May 1992 Pages: 97 - 110

3. Parallel implementation of neural networks

   • K. Wojtek Przytula
   • Viktor K. Prasanna
   • Wei-Ming Lin

   OriginalPaper 01 May 1992 Pages: 111 - 123

4. MSSM—A design aid for multi-stage systolic mapping

   • Yin-Tsung Hwang
   • Yu Hen Hu

   OriginalPaper 01 May 1992 Pages: 125 - 145

5. VLSI parallel architecture for Kalman filterAn algorithm specific approach

   • Magdy A. Bayoumi
   • Padma Rao
   • Bassem Alhalabi

   OriginalPaper 01 May 1992 Pages: 147 - 163

6. A radix-8 wafer scale FFT processor

   • Earl E. Swartzlander Jr.
   • Vijay K. Jain
   • Hiroomi Hikawa

   OriginalPaper 01 May 1992 Pages: 165 - 176

7. High-speed VLSI arithmetic processor architectures using hybrid number representation

   • H. R. Srinivas
   • Keshab K. Parhi

   OriginalPaper 01 May 1992 Pages: 177 - 198

8. Power dissipation of VLSI array processing systems

   • Paul M. Chau
   • Scott R. Powell

   OriginalPaper 01 May 1992 Pages: 199 - 212

9. DDFSGEN

   • Linda Kwai-Lin Lau
   • Rajeev Jain
   • Etan G. Cohen

   OriginalPaper 01 May 1992 Pages: 213 - 226

10. Systolic inner product arrays with automatic word rounding

    • M. Yan
    • J. V. Mc Canny

    Regular Papers 01 May 1992 Pages: 227 - 242

11. Initializing RAM-based logarithmic processors

    • M. G. Arnold
    • T. A. Bailey
    • J. J. Cupal

    Regular Papers 01 May 1992 Pages: 243 - 252